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Merge tag 'mlx5-updates-2017-08-17-V2' of git://git.kernel.org/pub/scm/linux/kernel/git/saeed/linux
Saeed Mahameed says: ==================== mlx5-updates-2017-08-17 Some updates for mlx5 ethernet and IPoIB device driver. Eran added the support for manage physical link state from netdevice upon interface open/close requests. Feras fixed the driver name showed in ethtool for IPoIB interfaces. Shalom Added the support for IPoIB netdevice ethtool get link settings. Gal and Eran exposed new diagnostic counters for outbound PCIe stalls and overflow and RX buffer fullness statistics. Code cleanups from Or Gerlitz. Variable types cleanup from Gal. ==================== Signed-off-by: David S. Miller <[email protected]>
2 parents d6e1e46 + 9da5106 commit 63bfc50

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12 files changed

+267
-54
lines changed

12 files changed

+267
-54
lines changed

‎drivers/net/ethernet/mellanox/mlx5/core/alloc.c

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -258,6 +258,7 @@ EXPORT_SYMBOL_GPL(mlx5_db_alloc);
258258
void mlx5_db_free(struct mlx5_core_dev *dev, struct mlx5_db *db)
259259
{
260260
u32 db_per_page = PAGE_SIZE / cache_line_size();
261+
261262
mutex_lock(&dev->priv.pgdir_mutex);
262263

263264
__set_bit(db->index, db->u.pgdir->bitmap);

‎drivers/net/ethernet/mellanox/mlx5/core/cmd.c

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -802,7 +802,6 @@ static void cmd_work_handler(struct work_struct *work)
802802
bool poll_cmd = ent->polling;
803803
int alloc_ret;
804804

805-
806805
sem = ent->page_queue ? &cmd->pages_sem : &cmd->sem;
807806
down(sem);
808807
if (!ent->page_queue) {

‎drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c

Lines changed: 44 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -176,7 +176,6 @@ static bool mlx5e_query_global_pause_combined(struct mlx5e_priv *priv)
176176

177177
int mlx5e_ethtool_get_sset_count(struct mlx5e_priv *priv, int sset)
178178
{
179-
180179
switch (sset) {
181180
case ETH_SS_STATS:
182181
return NUM_SW_COUNTERS +
@@ -207,7 +206,7 @@ static int mlx5e_get_sset_count(struct net_device *dev, int sset)
207206
return mlx5e_ethtool_get_sset_count(priv, sset);
208207
}
209208

210-
static void mlx5e_fill_stats_strings(struct mlx5e_priv *priv, uint8_t *data)
209+
static void mlx5e_fill_stats_strings(struct mlx5e_priv *priv, u8 *data)
211210
{
212211
int i, j, tc, prio, idx = 0;
213212
unsigned long pfc_combined;
@@ -242,10 +241,22 @@ static void mlx5e_fill_stats_strings(struct mlx5e_priv *priv, uint8_t *data)
242241
strcpy(data + (idx++) * ETH_GSTRING_LEN,
243242
pport_phy_statistical_stats_desc[i].format);
244243

244+
for (i = 0; i < NUM_PPORT_ETH_EXT_COUNTERS(priv); i++)
245+
strcpy(data + (idx++) * ETH_GSTRING_LEN,
246+
pport_eth_ext_stats_desc[i].format);
247+
245248
for (i = 0; i < NUM_PCIE_PERF_COUNTERS(priv); i++)
246249
strcpy(data + (idx++) * ETH_GSTRING_LEN,
247250
pcie_perf_stats_desc[i].format);
248251

252+
for (i = 0; i < NUM_PCIE_PERF_COUNTERS64(priv); i++)
253+
strcpy(data + (idx++) * ETH_GSTRING_LEN,
254+
pcie_perf_stats_desc64[i].format);
255+
256+
for (i = 0; i < NUM_PCIE_PERF_STALL_COUNTERS(priv); i++)
257+
strcpy(data + (idx++) * ETH_GSTRING_LEN,
258+
pcie_perf_stall_stats_desc[i].format);
259+
249260
for (prio = 0; prio < NUM_PPORT_PRIO; prio++) {
250261
for (i = 0; i < NUM_PPORT_PER_PRIO_TRAFFIC_COUNTERS; i++)
251262
sprintf(data + (idx++) * ETH_GSTRING_LEN,
@@ -297,8 +308,7 @@ static void mlx5e_fill_stats_strings(struct mlx5e_priv *priv, uint8_t *data)
297308
priv->channel_tc2txq[i][tc]);
298309
}
299310

300-
void mlx5e_ethtool_get_strings(struct mlx5e_priv *priv,
301-
uint32_t stringset, uint8_t *data)
311+
void mlx5e_ethtool_get_strings(struct mlx5e_priv *priv, u32 stringset, u8 *data)
302312
{
303313
int i;
304314

@@ -320,8 +330,7 @@ void mlx5e_ethtool_get_strings(struct mlx5e_priv *priv,
320330
}
321331
}
322332

323-
static void mlx5e_get_strings(struct net_device *dev,
324-
uint32_t stringset, uint8_t *data)
333+
static void mlx5e_get_strings(struct net_device *dev, u32 stringset, u8 *data)
325334
{
326335
struct mlx5e_priv *priv = netdev_priv(dev);
327336

@@ -373,10 +382,22 @@ void mlx5e_ethtool_get_ethtool_stats(struct mlx5e_priv *priv,
373382
data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.phy_statistical_counters,
374383
pport_phy_statistical_stats_desc, i);
375384

385+
for (i = 0; i < NUM_PPORT_ETH_EXT_COUNTERS(priv); i++)
386+
data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.eth_ext_counters,
387+
pport_eth_ext_stats_desc, i);
388+
376389
for (i = 0; i < NUM_PCIE_PERF_COUNTERS(priv); i++)
377390
data[idx++] = MLX5E_READ_CTR32_BE(&priv->stats.pcie.pcie_perf_counters,
378391
pcie_perf_stats_desc, i);
379392

393+
for (i = 0; i < NUM_PCIE_PERF_COUNTERS64(priv); i++)
394+
data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pcie.pcie_perf_counters,
395+
pcie_perf_stats_desc64, i);
396+
397+
for (i = 0; i < NUM_PCIE_PERF_STALL_COUNTERS(priv); i++)
398+
data[idx++] = MLX5E_READ_CTR32_BE(&priv->stats.pcie.pcie_perf_counters,
399+
pcie_perf_stall_stats_desc, i);
400+
380401
for (prio = 0; prio < NUM_PPORT_PRIO; prio++) {
381402
for (i = 0; i < NUM_PPORT_PER_PRIO_TRAFFIC_COUNTERS; i++)
382403
data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.per_prio_counters[prio],
@@ -964,24 +985,27 @@ static u8 get_connector_port(u32 eth_proto, u8 connector_type)
964985
if (connector_type && connector_type < MLX5E_CONNECTOR_TYPE_NUMBER)
965986
return ptys2connector_type[connector_type];
966987

967-
if (eth_proto & (MLX5E_PROT_MASK(MLX5E_10GBASE_SR)
968-
| MLX5E_PROT_MASK(MLX5E_40GBASE_SR4)
969-
| MLX5E_PROT_MASK(MLX5E_100GBASE_SR4)
970-
| MLX5E_PROT_MASK(MLX5E_1000BASE_CX_SGMII))) {
971-
return PORT_FIBRE;
988+
if (eth_proto &
989+
(MLX5E_PROT_MASK(MLX5E_10GBASE_SR) |
990+
MLX5E_PROT_MASK(MLX5E_40GBASE_SR4) |
991+
MLX5E_PROT_MASK(MLX5E_100GBASE_SR4) |
992+
MLX5E_PROT_MASK(MLX5E_1000BASE_CX_SGMII))) {
993+
return PORT_FIBRE;
972994
}
973995

974-
if (eth_proto & (MLX5E_PROT_MASK(MLX5E_40GBASE_CR4)
975-
| MLX5E_PROT_MASK(MLX5E_10GBASE_CR)
976-
| MLX5E_PROT_MASK(MLX5E_100GBASE_CR4))) {
977-
return PORT_DA;
996+
if (eth_proto &
997+
(MLX5E_PROT_MASK(MLX5E_40GBASE_CR4) |
998+
MLX5E_PROT_MASK(MLX5E_10GBASE_CR) |
999+
MLX5E_PROT_MASK(MLX5E_100GBASE_CR4))) {
1000+
return PORT_DA;
9781001
}
9791002

980-
if (eth_proto & (MLX5E_PROT_MASK(MLX5E_10GBASE_KX4)
981-
| MLX5E_PROT_MASK(MLX5E_10GBASE_KR)
982-
| MLX5E_PROT_MASK(MLX5E_40GBASE_KR4)
983-
| MLX5E_PROT_MASK(MLX5E_100GBASE_KR4))) {
984-
return PORT_NONE;
1003+
if (eth_proto &
1004+
(MLX5E_PROT_MASK(MLX5E_10GBASE_KX4) |
1005+
MLX5E_PROT_MASK(MLX5E_10GBASE_KR) |
1006+
MLX5E_PROT_MASK(MLX5E_40GBASE_KR4) |
1007+
MLX5E_PROT_MASK(MLX5E_100GBASE_KR4))) {
1008+
return PORT_NONE;
9851009
}
9861010

9871011
return PORT_OTHER;

‎drivers/net/ethernet/mellanox/mlx5/core/en_main.c

Lines changed: 13 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -288,6 +288,12 @@ static void mlx5e_update_pport_counters(struct mlx5e_priv *priv, bool full)
288288
mlx5_core_access_reg(mdev, in, sz, out, sz, MLX5_REG_PPCNT, 0, 0);
289289
}
290290

291+
if (MLX5_CAP_PCAM_FEATURE(mdev, rx_buffer_fullness_counters)) {
292+
out = pstats->eth_ext_counters;
293+
MLX5_SET(ppcnt_reg, in, grp, MLX5_ETHERNET_EXTENDED_COUNTERS_GROUP);
294+
mlx5_core_access_reg(mdev, in, sz, out, sz, MLX5_REG_PPCNT, 0, 0);
295+
}
296+
291297
MLX5_SET(ppcnt_reg, in, grp, MLX5_PER_PRIORITY_COUNTERS_GROUP);
292298
for (prio = 0; prio < NUM_PPORT_PRIO; prio++) {
293299
out = pstats->per_prio_counters[prio];
@@ -2682,6 +2688,8 @@ int mlx5e_open(struct net_device *netdev)
26822688

26832689
mutex_lock(&priv->state_lock);
26842690
err = mlx5e_open_locked(netdev);
2691+
if (!err)
2692+
mlx5_set_port_admin_status(priv->mdev, MLX5_PORT_UP);
26852693
mutex_unlock(&priv->state_lock);
26862694

26872695
return err;
@@ -2716,6 +2724,7 @@ int mlx5e_close(struct net_device *netdev)
27162724
return -ENODEV;
27172725

27182726
mutex_lock(&priv->state_lock);
2727+
mlx5_set_port_admin_status(priv->mdev, MLX5_PORT_DOWN);
27192728
err = mlx5e_close_locked(netdev);
27202729
mutex_unlock(&priv->state_lock);
27212730

@@ -4187,6 +4196,10 @@ static void mlx5e_nic_enable(struct mlx5e_priv *priv)
41874196

41884197
mlx5e_init_l2_addr(priv);
41894198

4199+
/* Marking the link as currently not needed by the Driver */
4200+
if (!netif_running(netdev))
4201+
mlx5_set_port_admin_status(mdev, MLX5_PORT_DOWN);
4202+
41904203
/* MTU range: 68 - hw-specific max */
41914204
netdev->min_mtu = ETH_MIN_MTU;
41924205
mlx5_query_port_max_mtu(priv->mdev, &max_mtu, 1);

‎drivers/net/ethernet/mellanox/mlx5/core/en_rep.c

Lines changed: 13 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -613,15 +613,18 @@ static int mlx5e_rep_open(struct net_device *dev)
613613
struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
614614
int err;
615615

616-
err = mlx5e_open(dev);
616+
mutex_lock(&priv->state_lock);
617+
err = mlx5e_open_locked(dev);
617618
if (err)
618-
return err;
619+
goto unlock;
619620

620-
err = mlx5_eswitch_set_vport_state(esw, rep->vport, MLX5_ESW_VPORT_ADMIN_STATE_UP);
621-
if (!err)
621+
if (!mlx5_eswitch_set_vport_state(esw, rep->vport,
622+
MLX5_ESW_VPORT_ADMIN_STATE_UP))
622623
netif_carrier_on(dev);
623624

624-
return 0;
625+
unlock:
626+
mutex_unlock(&priv->state_lock);
627+
return err;
625628
}
626629

627630
static int mlx5e_rep_close(struct net_device *dev)
@@ -630,10 +633,13 @@ static int mlx5e_rep_close(struct net_device *dev)
630633
struct mlx5e_rep_priv *rpriv = priv->ppriv;
631634
struct mlx5_eswitch_rep *rep = rpriv->rep;
632635
struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
636+
int ret;
633637

638+
mutex_lock(&priv->state_lock);
634639
(void)mlx5_eswitch_set_vport_state(esw, rep->vport, MLX5_ESW_VPORT_ADMIN_STATE_DOWN);
635-
636-
return mlx5e_close(dev);
640+
ret = mlx5e_close_locked(dev);
641+
mutex_unlock(&priv->state_lock);
642+
return ret;
637643
}
638644

639645
static int mlx5e_rep_get_phys_port_name(struct net_device *dev,

‎drivers/net/ethernet/mellanox/mlx5/core/en_rx.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -509,8 +509,8 @@ static void mlx5e_lro_update_hdr(struct sk_buff *skb, struct mlx5_cqe64 *cqe,
509509
u16 tot_len;
510510

511511
u8 l4_hdr_type = get_cqe_l4_hdr_type(cqe);
512-
int tcp_ack = ((CQE_L4_HDR_TYPE_TCP_ACK_NO_DATA == l4_hdr_type) ||
513-
(CQE_L4_HDR_TYPE_TCP_ACK_AND_DATA == l4_hdr_type));
512+
int tcp_ack = ((l4_hdr_type == CQE_L4_HDR_TYPE_TCP_ACK_NO_DATA) ||
513+
(l4_hdr_type == CQE_L4_HDR_TYPE_TCP_ACK_AND_DATA));
514514

515515
skb->mac_len = ETH_HLEN;
516516
proto = __vlan_get_protocol(skb, eth->h_proto, &network_depth);

‎drivers/net/ethernet/mellanox/mlx5/core/en_stats.h

Lines changed: 43 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -47,7 +47,7 @@
4747

4848
struct counter_desc {
4949
char format[ETH_GSTRING_LEN];
50-
int offset; /* Byte offset */
50+
size_t offset; /* Byte offset */
5151
};
5252

5353
struct mlx5e_sw_stats {
@@ -216,6 +216,12 @@ static const struct counter_desc vport_stats_desc[] = {
216216
MLX5_GET64(ppcnt_reg, pstats->per_prio_counters[prio], \
217217
counter_set.eth_per_prio_grp_data_layout.c##_high)
218218
#define NUM_PPORT_PRIO 8
219+
#define PPORT_ETH_EXT_OFF(c) \
220+
MLX5_BYTE_OFF(ppcnt_reg, \
221+
counter_set.eth_extended_cntrs_grp_data_layout.c##_high)
222+
#define PPORT_ETH_EXT_GET(pstats, c) \
223+
MLX5_GET64(ppcnt_reg, (pstats)->eth_ext_counters, \
224+
counter_set.eth_extended_cntrs_grp_data_layout.c##_high)
219225

220226
struct mlx5e_pport_stats {
221227
__be64 IEEE_802_3_counters[MLX5_ST_SZ_QW(ppcnt_reg)];
@@ -224,6 +230,7 @@ struct mlx5e_pport_stats {
224230
__be64 per_prio_counters[NUM_PPORT_PRIO][MLX5_ST_SZ_QW(ppcnt_reg)];
225231
__be64 phy_counters[MLX5_ST_SZ_QW(ppcnt_reg)];
226232
__be64 phy_statistical_counters[MLX5_ST_SZ_QW(ppcnt_reg)];
233+
__be64 eth_ext_counters[MLX5_ST_SZ_QW(ppcnt_reg)];
227234
};
228235

229236
static const struct counter_desc pport_802_3_stats_desc[] = {
@@ -290,12 +297,22 @@ static const struct counter_desc pport_per_prio_pfc_stats_desc[] = {
290297
{ "rx_%s_pause_transition", PPORT_PER_PRIO_OFF(rx_pause_transition) },
291298
};
292299

300+
static const struct counter_desc pport_eth_ext_stats_desc[] = {
301+
{ "rx_buffer_passed_thres_phy", PPORT_ETH_EXT_OFF(rx_buffer_almost_full) },
302+
};
303+
293304
#define PCIE_PERF_OFF(c) \
294305
MLX5_BYTE_OFF(mpcnt_reg, counter_set.pcie_perf_cntrs_grp_data_layout.c)
295306
#define PCIE_PERF_GET(pcie_stats, c) \
296307
MLX5_GET(mpcnt_reg, (pcie_stats)->pcie_perf_counters, \
297308
counter_set.pcie_perf_cntrs_grp_data_layout.c)
298309

310+
#define PCIE_PERF_OFF64(c) \
311+
MLX5_BYTE_OFF(mpcnt_reg, counter_set.pcie_perf_cntrs_grp_data_layout.c##_high)
312+
#define PCIE_PERF_GET64(pcie_stats, c) \
313+
MLX5_GET64(mpcnt_reg, (pcie_stats)->pcie_perf_counters, \
314+
counter_set.pcie_perf_cntrs_grp_data_layout.c##_high)
315+
299316
struct mlx5e_pcie_stats {
300317
__be64 pcie_perf_counters[MLX5_ST_SZ_QW(mpcnt_reg)];
301318
};
@@ -305,6 +322,17 @@ static const struct counter_desc pcie_perf_stats_desc[] = {
305322
{ "tx_pci_signal_integrity", PCIE_PERF_OFF(tx_errors) },
306323
};
307324

325+
static const struct counter_desc pcie_perf_stats_desc64[] = {
326+
{ "outbound_pci_buffer_overflow", PCIE_PERF_OFF64(tx_overflow_buffer_pkt) },
327+
};
328+
329+
static const struct counter_desc pcie_perf_stall_stats_desc[] = {
330+
{ "outbound_pci_stalled_rd", PCIE_PERF_OFF(outbound_stalled_reads) },
331+
{ "outbound_pci_stalled_wr", PCIE_PERF_OFF(outbound_stalled_writes) },
332+
{ "outbound_pci_stalled_rd_events", PCIE_PERF_OFF(outbound_stalled_reads_events) },
333+
{ "outbound_pci_stalled_wr_events", PCIE_PERF_OFF(outbound_stalled_writes_events) },
334+
};
335+
308336
struct mlx5e_rq_stats {
309337
u64 packets;
310338
u64 bytes;
@@ -397,17 +425,29 @@ static const struct counter_desc sq_stats_desc[] = {
397425
#define NUM_PCIE_PERF_COUNTERS(priv) \
398426
(ARRAY_SIZE(pcie_perf_stats_desc) * \
399427
MLX5_CAP_MCAM_FEATURE((priv)->mdev, pcie_performance_group))
428+
#define NUM_PCIE_PERF_COUNTERS64(priv) \
429+
(ARRAY_SIZE(pcie_perf_stats_desc64) * \
430+
MLX5_CAP_MCAM_FEATURE((priv)->mdev, tx_overflow_buffer_pkt))
431+
#define NUM_PCIE_PERF_STALL_COUNTERS(priv) \
432+
(ARRAY_SIZE(pcie_perf_stall_stats_desc) * \
433+
MLX5_CAP_MCAM_FEATURE((priv)->mdev, pcie_outbound_stalled))
400434
#define NUM_PPORT_PER_PRIO_TRAFFIC_COUNTERS \
401435
ARRAY_SIZE(pport_per_prio_traffic_stats_desc)
402436
#define NUM_PPORT_PER_PRIO_PFC_COUNTERS \
403437
ARRAY_SIZE(pport_per_prio_pfc_stats_desc)
438+
#define NUM_PPORT_ETH_EXT_COUNTERS(priv) \
439+
(ARRAY_SIZE(pport_eth_ext_stats_desc) * \
440+
MLX5_CAP_PCAM_FEATURE((priv)->mdev, rx_buffer_fullness_counters))
404441
#define NUM_PPORT_COUNTERS(priv) (NUM_PPORT_802_3_COUNTERS + \
405442
NUM_PPORT_2863_COUNTERS + \
406443
NUM_PPORT_2819_COUNTERS + \
407444
NUM_PPORT_PHY_STATISTICAL_COUNTERS(priv) + \
408445
NUM_PPORT_PER_PRIO_TRAFFIC_COUNTERS * \
409-
NUM_PPORT_PRIO)
410-
#define NUM_PCIE_COUNTERS(priv) NUM_PCIE_PERF_COUNTERS(priv)
446+
NUM_PPORT_PRIO + \
447+
NUM_PPORT_ETH_EXT_COUNTERS(priv))
448+
#define NUM_PCIE_COUNTERS(priv) (NUM_PCIE_PERF_COUNTERS(priv) + \
449+
NUM_PCIE_PERF_COUNTERS64(priv) +\
450+
NUM_PCIE_PERF_STALL_COUNTERS(priv))
411451
#define NUM_RQ_STATS ARRAY_SIZE(rq_stats_desc)
412452
#define NUM_SQ_STATS ARRAY_SIZE(sq_stats_desc)
413453

‎drivers/net/ethernet/mellanox/mlx5/core/eq.c

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -188,6 +188,7 @@ static enum mlx5_dev_event port_subtype_event(u8 subtype)
188188
static void eq_update_ci(struct mlx5_eq *eq, int arm)
189189
{
190190
__be32 __iomem *addr = eq->doorbell + (arm ? 0 : 2);
191+
191192
u32 val = (eq->cons_index & 0xffffff) | (eq->eqn << 24);
192193
__raw_writel((__force u32)cpu_to_be32(val), addr);
193194
/* We still want ordering, just not swabbing, so add a barrier */

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