|
427 | 427 | #interrupt-cells = <2>;
|
428 | 428 | };
|
429 | 429 |
|
430 |
| - pcfg_pull_up: pcfg-pull-up { |
431 |
| - bias-pull-up; |
432 |
| - }; |
433 |
| - |
434 |
| - pcfg_pull_down: pcfg-pull-down { |
435 |
| - bias-pull-down; |
| 430 | + pcfg_pull_default: pcfg_pull_default { |
| 431 | + bias-pull-pin-default; |
436 | 432 | };
|
437 | 433 |
|
438 | 434 | pcfg_pull_none: pcfg-pull-none {
|
|
473 | 469 | };
|
474 | 470 |
|
475 | 471 | emmc_cmd: emmc-cmd {
|
476 |
| - rockchip,pins = <2 1 RK_FUNC_2 &pcfg_pull_none>; |
| 472 | + rockchip,pins = <2 1 RK_FUNC_2 &pcfg_pull_default>; |
477 | 473 | };
|
478 | 474 |
|
479 | 475 | emmc_bus8: emmc-bus8 {
|
480 |
| - rockchip,pins = <1 24 RK_FUNC_2 &pcfg_pull_none>, |
481 |
| - <1 25 RK_FUNC_2 &pcfg_pull_none>, |
482 |
| - <1 26 RK_FUNC_2 &pcfg_pull_none>, |
483 |
| - <1 27 RK_FUNC_2 &pcfg_pull_none>, |
484 |
| - <1 28 RK_FUNC_2 &pcfg_pull_none>, |
485 |
| - <1 29 RK_FUNC_2 &pcfg_pull_none>, |
486 |
| - <1 30 RK_FUNC_2 &pcfg_pull_none>, |
487 |
| - <1 31 RK_FUNC_2 &pcfg_pull_none>; |
| 476 | + rockchip,pins = <1 24 RK_FUNC_2 &pcfg_pull_default>, |
| 477 | + <1 25 RK_FUNC_2 &pcfg_pull_default>, |
| 478 | + <1 26 RK_FUNC_2 &pcfg_pull_default>, |
| 479 | + <1 27 RK_FUNC_2 &pcfg_pull_default>, |
| 480 | + <1 28 RK_FUNC_2 &pcfg_pull_default>, |
| 481 | + <1 29 RK_FUNC_2 &pcfg_pull_default>, |
| 482 | + <1 30 RK_FUNC_2 &pcfg_pull_default>, |
| 483 | + <1 31 RK_FUNC_2 &pcfg_pull_default>; |
488 | 484 | };
|
489 | 485 | };
|
490 | 486 |
|
|
522 | 518 |
|
523 | 519 | uart0 {
|
524 | 520 | uart0_xfer: uart0-xfer {
|
525 |
| - rockchip,pins = <0 16 RK_FUNC_1 &pcfg_pull_up>, |
| 521 | + rockchip,pins = <0 16 RK_FUNC_1 &pcfg_pull_default>, |
526 | 522 | <0 17 RK_FUNC_1 &pcfg_pull_none>;
|
527 | 523 | };
|
528 | 524 |
|
529 | 525 | uart0_cts: uart0-cts {
|
530 |
| - rockchip,pins = <0 18 RK_FUNC_1 &pcfg_pull_up>; |
| 526 | + rockchip,pins = <0 18 RK_FUNC_1 &pcfg_pull_default>; |
531 | 527 | };
|
532 | 528 |
|
533 | 529 | uart0_rts: uart0-rts {
|
|
537 | 533 |
|
538 | 534 | uart1 {
|
539 | 535 | uart1_xfer: uart1-xfer {
|
540 |
| - rockchip,pins = <2 22 RK_FUNC_1 &pcfg_pull_none>, |
| 536 | + rockchip,pins = <2 22 RK_FUNC_1 &pcfg_pull_default>, |
541 | 537 | <2 23 RK_FUNC_1 &pcfg_pull_none>;
|
542 | 538 | };
|
543 | 539 | /* no rts / cts for uart1 */
|
544 | 540 | };
|
545 | 541 |
|
546 | 542 | uart2 {
|
547 | 543 | uart2_xfer: uart2-xfer {
|
548 |
| - rockchip,pins = <1 18 RK_FUNC_2 &pcfg_pull_none>, |
| 544 | + rockchip,pins = <1 18 RK_FUNC_2 &pcfg_pull_default>, |
549 | 545 | <1 19 RK_FUNC_2 &pcfg_pull_none>;
|
550 | 546 | };
|
551 | 547 | /* no rts / cts for uart2 */
|
|
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