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Michael Chandavem330
Michael Chan
authored and
davem330
committed
bnxt_en: Update firmware interface spec. to 1.10.0.100.
Some error recovery updates to the spec., among other minor changes. Signed-off-by: Michael Chan <[email protected]> Signed-off-by: David S. Miller <[email protected]>
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‎drivers/net/ethernet/broadcom/bnxt/bnxt_hsi.h

Lines changed: 103 additions & 43 deletions
Original file line numberDiff line numberDiff line change
@@ -44,11 +44,12 @@ struct hwrm_resp_hdr {
4444
#define TLV_TYPE_ENGINE_CKV_IV 0x8003UL
4545
#define TLV_TYPE_ENGINE_CKV_AUTH_TAG 0x8004UL
4646
#define TLV_TYPE_ENGINE_CKV_CIPHERTEXT 0x8005UL
47-
#define TLV_TYPE_ENGINE_CKV_ALGORITHMS 0x8006UL
47+
#define TLV_TYPE_ENGINE_CKV_HOST_ALGORITHMS 0x8006UL
4848
#define TLV_TYPE_ENGINE_CKV_HOST_ECC_PUBLIC_KEY 0x8007UL
4949
#define TLV_TYPE_ENGINE_CKV_ECDSA_SIGNATURE 0x8008UL
50-
#define TLV_TYPE_ENGINE_CKV_SRT_ECC_PUBLIC_KEY 0x8009UL
51-
#define TLV_TYPE_LAST TLV_TYPE_ENGINE_CKV_SRT_ECC_PUBLIC_KEY
50+
#define TLV_TYPE_ENGINE_CKV_FW_ECC_PUBLIC_KEY 0x8009UL
51+
#define TLV_TYPE_ENGINE_CKV_FW_ALGORITHMS 0x800aUL
52+
#define TLV_TYPE_LAST TLV_TYPE_ENGINE_CKV_FW_ALGORITHMS
5253

5354

5455
/* tlv (size:64b/8B) */
@@ -201,10 +202,16 @@ struct cmd_nums {
201202
#define HWRM_PORT_QSTATS_EXT 0xb4UL
202203
#define HWRM_PORT_PHY_MDIO_WRITE 0xb5UL
203204
#define HWRM_PORT_PHY_MDIO_READ 0xb6UL
205+
#define HWRM_PORT_PHY_MDIO_BUS_ACQUIRE 0xb7UL
206+
#define HWRM_PORT_PHY_MDIO_BUS_RELEASE 0xb8UL
204207
#define HWRM_FW_RESET 0xc0UL
205208
#define HWRM_FW_QSTATUS 0xc1UL
206209
#define HWRM_FW_HEALTH_CHECK 0xc2UL
207210
#define HWRM_FW_SYNC 0xc3UL
211+
#define HWRM_FW_STATE_BUFFER_QCAPS 0xc4UL
212+
#define HWRM_FW_STATE_QUIESCE 0xc5UL
213+
#define HWRM_FW_STATE_BACKUP 0xc6UL
214+
#define HWRM_FW_STATE_RESTORE 0xc7UL
208215
#define HWRM_FW_SET_TIME 0xc8UL
209216
#define HWRM_FW_GET_TIME 0xc9UL
210217
#define HWRM_FW_SET_STRUCTURED_DATA 0xcaUL
@@ -216,7 +223,10 @@ struct cmd_nums {
216223
#define HWRM_FWD_ASYNC_EVENT_CMPL 0xd3UL
217224
#define HWRM_OEM_CMD 0xd4UL
218225
#define HWRM_PORT_PRBS_TEST 0xd5UL
226+
#define HWRM_PORT_SFP_SIDEBAND_CFG 0xd6UL
227+
#define HWRM_PORT_SFP_SIDEBAND_QCFG 0xd7UL
219228
#define HWRM_TEMP_MONITOR_QUERY 0xe0UL
229+
#define HWRM_REG_POWER_QUERY 0xe1UL
220230
#define HWRM_WOL_FILTER_ALLOC 0xf0UL
221231
#define HWRM_WOL_FILTER_FREE 0xf1UL
222232
#define HWRM_WOL_FILTER_QCFG 0xf2UL
@@ -411,8 +421,8 @@ struct hwrm_err_output {
411421
#define HWRM_VERSION_MAJOR 1
412422
#define HWRM_VERSION_MINOR 10
413423
#define HWRM_VERSION_UPDATE 0
414-
#define HWRM_VERSION_RSVD 89
415-
#define HWRM_VERSION_STR "1.10.0.89"
424+
#define HWRM_VERSION_RSVD 100
425+
#define HWRM_VERSION_STR "1.10.0.100"
416426

417427
/* hwrm_ver_get_input (size:192b/24B) */
418428
struct hwrm_ver_get_input {
@@ -805,6 +815,37 @@ struct hwrm_async_event_cmpl_vf_cfg_change {
805815
#define ASYNC_EVENT_CMPL_VF_CFG_CHANGE_EVENT_DATA1_TRUSTED_VF_CFG_CHANGE 0x10UL
806816
};
807817

818+
/* hwrm_async_event_cmpl_default_vnic_change (size:128b/16B) */
819+
struct hwrm_async_event_cmpl_default_vnic_change {
820+
__le16 type;
821+
#define ASYNC_EVENT_CMPL_DEFAULT_VNIC_CHANGE_TYPE_MASK 0x3fUL
822+
#define ASYNC_EVENT_CMPL_DEFAULT_VNIC_CHANGE_TYPE_SFT 0
823+
#define ASYNC_EVENT_CMPL_DEFAULT_VNIC_CHANGE_TYPE_HWRM_ASYNC_EVENT 0x2eUL
824+
#define ASYNC_EVENT_CMPL_DEFAULT_VNIC_CHANGE_TYPE_LAST ASYNC_EVENT_CMPL_DEFAULT_VNIC_CHANGE_TYPE_HWRM_ASYNC_EVENT
825+
#define ASYNC_EVENT_CMPL_DEFAULT_VNIC_CHANGE_UNUSED1_MASK 0xffc0UL
826+
#define ASYNC_EVENT_CMPL_DEFAULT_VNIC_CHANGE_UNUSED1_SFT 6
827+
__le16 event_id;
828+
#define ASYNC_EVENT_CMPL_DEFAULT_VNIC_CHANGE_EVENT_ID_ALLOC_FREE_NOTIFICATION 0x35UL
829+
#define ASYNC_EVENT_CMPL_DEFAULT_VNIC_CHANGE_EVENT_ID_LAST ASYNC_EVENT_CMPL_DEFAULT_VNIC_CHANGE_EVENT_ID_ALLOC_FREE_NOTIFICATION
830+
__le32 event_data2;
831+
u8 opaque_v;
832+
#define ASYNC_EVENT_CMPL_DEFAULT_VNIC_CHANGE_V 0x1UL
833+
#define ASYNC_EVENT_CMPL_DEFAULT_VNIC_CHANGE_OPAQUE_MASK 0xfeUL
834+
#define ASYNC_EVENT_CMPL_DEFAULT_VNIC_CHANGE_OPAQUE_SFT 1
835+
u8 timestamp_lo;
836+
__le16 timestamp_hi;
837+
__le32 event_data1;
838+
#define ASYNC_EVENT_CMPL_DEFAULT_VNIC_CHANGE_EVENT_DATA1_DEF_VNIC_STATE_MASK 0x3UL
839+
#define ASYNC_EVENT_CMPL_DEFAULT_VNIC_CHANGE_EVENT_DATA1_DEF_VNIC_STATE_SFT 0
840+
#define ASYNC_EVENT_CMPL_DEFAULT_VNIC_CHANGE_EVENT_DATA1_DEF_VNIC_STATE_DEF_VNIC_ALLOC 0x1UL
841+
#define ASYNC_EVENT_CMPL_DEFAULT_VNIC_CHANGE_EVENT_DATA1_DEF_VNIC_STATE_DEF_VNIC_FREE 0x2UL
842+
#define ASYNC_EVENT_CMPL_DEFAULT_VNIC_CHANGE_EVENT_DATA1_DEF_VNIC_STATE_LAST ASYNC_EVENT_CMPL_DEFAULT_VNIC_CHANGE_EVENT_DATA1_DEF_VNIC_STATE_DEF_VNIC_FREE
843+
#define ASYNC_EVENT_CMPL_DEFAULT_VNIC_CHANGE_EVENT_DATA1_PF_ID_MASK 0x3fcUL
844+
#define ASYNC_EVENT_CMPL_DEFAULT_VNIC_CHANGE_EVENT_DATA1_PF_ID_SFT 2
845+
#define ASYNC_EVENT_CMPL_DEFAULT_VNIC_CHANGE_EVENT_DATA1_VF_ID_MASK 0x3fffc00UL
846+
#define ASYNC_EVENT_CMPL_DEFAULT_VNIC_CHANGE_EVENT_DATA1_VF_ID_SFT 10
847+
};
848+
808849
/* hwrm_async_event_cmpl_hw_flow_aged (size:128b/16B) */
809850
struct hwrm_async_event_cmpl_hw_flow_aged {
810851
__le16 type;
@@ -1047,31 +1088,33 @@ struct hwrm_func_qcaps_output {
10471088
__le16 fid;
10481089
__le16 port_id;
10491090
__le32 flags;
1050-
#define FUNC_QCAPS_RESP_FLAGS_PUSH_MODE_SUPPORTED 0x1UL
1051-
#define FUNC_QCAPS_RESP_FLAGS_GLOBAL_MSIX_AUTOMASKING 0x2UL
1052-
#define FUNC_QCAPS_RESP_FLAGS_PTP_SUPPORTED 0x4UL
1053-
#define FUNC_QCAPS_RESP_FLAGS_ROCE_V1_SUPPORTED 0x8UL
1054-
#define FUNC_QCAPS_RESP_FLAGS_ROCE_V2_SUPPORTED 0x10UL
1055-
#define FUNC_QCAPS_RESP_FLAGS_WOL_MAGICPKT_SUPPORTED 0x20UL
1056-
#define FUNC_QCAPS_RESP_FLAGS_WOL_BMP_SUPPORTED 0x40UL
1057-
#define FUNC_QCAPS_RESP_FLAGS_TX_RING_RL_SUPPORTED 0x80UL
1058-
#define FUNC_QCAPS_RESP_FLAGS_TX_BW_CFG_SUPPORTED 0x100UL
1059-
#define FUNC_QCAPS_RESP_FLAGS_VF_TX_RING_RL_SUPPORTED 0x200UL
1060-
#define FUNC_QCAPS_RESP_FLAGS_VF_BW_CFG_SUPPORTED 0x400UL
1061-
#define FUNC_QCAPS_RESP_FLAGS_STD_TX_RING_MODE_SUPPORTED 0x800UL
1062-
#define FUNC_QCAPS_RESP_FLAGS_GENEVE_TUN_FLAGS_SUPPORTED 0x1000UL
1063-
#define FUNC_QCAPS_RESP_FLAGS_NVGRE_TUN_FLAGS_SUPPORTED 0x2000UL
1064-
#define FUNC_QCAPS_RESP_FLAGS_GRE_TUN_FLAGS_SUPPORTED 0x4000UL
1065-
#define FUNC_QCAPS_RESP_FLAGS_MPLS_TUN_FLAGS_SUPPORTED 0x8000UL
1066-
#define FUNC_QCAPS_RESP_FLAGS_PCIE_STATS_SUPPORTED 0x10000UL
1067-
#define FUNC_QCAPS_RESP_FLAGS_ADOPTED_PF_SUPPORTED 0x20000UL
1068-
#define FUNC_QCAPS_RESP_FLAGS_ADMIN_PF_SUPPORTED 0x40000UL
1069-
#define FUNC_QCAPS_RESP_FLAGS_LINK_ADMIN_STATUS_SUPPORTED 0x80000UL
1070-
#define FUNC_QCAPS_RESP_FLAGS_WCB_PUSH_MODE 0x100000UL
1071-
#define FUNC_QCAPS_RESP_FLAGS_DYNAMIC_TX_RING_ALLOC 0x200000UL
1072-
#define FUNC_QCAPS_RESP_FLAGS_HOT_RESET_CAPABLE 0x400000UL
1073-
#define FUNC_QCAPS_RESP_FLAGS_ERROR_RECOVERY_CAPABLE 0x800000UL
1074-
#define FUNC_QCAPS_RESP_FLAGS_EXT_STATS_SUPPORTED 0x1000000UL
1091+
#define FUNC_QCAPS_RESP_FLAGS_PUSH_MODE_SUPPORTED 0x1UL
1092+
#define FUNC_QCAPS_RESP_FLAGS_GLOBAL_MSIX_AUTOMASKING 0x2UL
1093+
#define FUNC_QCAPS_RESP_FLAGS_PTP_SUPPORTED 0x4UL
1094+
#define FUNC_QCAPS_RESP_FLAGS_ROCE_V1_SUPPORTED 0x8UL
1095+
#define FUNC_QCAPS_RESP_FLAGS_ROCE_V2_SUPPORTED 0x10UL
1096+
#define FUNC_QCAPS_RESP_FLAGS_WOL_MAGICPKT_SUPPORTED 0x20UL
1097+
#define FUNC_QCAPS_RESP_FLAGS_WOL_BMP_SUPPORTED 0x40UL
1098+
#define FUNC_QCAPS_RESP_FLAGS_TX_RING_RL_SUPPORTED 0x80UL
1099+
#define FUNC_QCAPS_RESP_FLAGS_TX_BW_CFG_SUPPORTED 0x100UL
1100+
#define FUNC_QCAPS_RESP_FLAGS_VF_TX_RING_RL_SUPPORTED 0x200UL
1101+
#define FUNC_QCAPS_RESP_FLAGS_VF_BW_CFG_SUPPORTED 0x400UL
1102+
#define FUNC_QCAPS_RESP_FLAGS_STD_TX_RING_MODE_SUPPORTED 0x800UL
1103+
#define FUNC_QCAPS_RESP_FLAGS_GENEVE_TUN_FLAGS_SUPPORTED 0x1000UL
1104+
#define FUNC_QCAPS_RESP_FLAGS_NVGRE_TUN_FLAGS_SUPPORTED 0x2000UL
1105+
#define FUNC_QCAPS_RESP_FLAGS_GRE_TUN_FLAGS_SUPPORTED 0x4000UL
1106+
#define FUNC_QCAPS_RESP_FLAGS_MPLS_TUN_FLAGS_SUPPORTED 0x8000UL
1107+
#define FUNC_QCAPS_RESP_FLAGS_PCIE_STATS_SUPPORTED 0x10000UL
1108+
#define FUNC_QCAPS_RESP_FLAGS_ADOPTED_PF_SUPPORTED 0x20000UL
1109+
#define FUNC_QCAPS_RESP_FLAGS_ADMIN_PF_SUPPORTED 0x40000UL
1110+
#define FUNC_QCAPS_RESP_FLAGS_LINK_ADMIN_STATUS_SUPPORTED 0x80000UL
1111+
#define FUNC_QCAPS_RESP_FLAGS_WCB_PUSH_MODE 0x100000UL
1112+
#define FUNC_QCAPS_RESP_FLAGS_DYNAMIC_TX_RING_ALLOC 0x200000UL
1113+
#define FUNC_QCAPS_RESP_FLAGS_HOT_RESET_CAPABLE 0x400000UL
1114+
#define FUNC_QCAPS_RESP_FLAGS_ERROR_RECOVERY_CAPABLE 0x800000UL
1115+
#define FUNC_QCAPS_RESP_FLAGS_EXT_STATS_SUPPORTED 0x1000000UL
1116+
#define FUNC_QCAPS_RESP_FLAGS_ERR_RECOVER_RELOAD 0x2000000UL
1117+
#define FUNC_QCAPS_RESP_FLAGS_NOTIFY_VF_DEF_VNIC_CHNG_SUPPORTED 0x4000000UL
10751118
u8 mac_address[6];
10761119
__le16 max_rsscos_ctx;
10771120
__le16 max_cmpl_rings;
@@ -1208,7 +1251,8 @@ struct hwrm_func_qcfg_output {
12081251
__le16 alloc_stat_ctx;
12091252
__le16 alloc_msix;
12101253
__le16 registered_vfs;
1211-
u8 unused_1[3];
1254+
__le16 l2_doorbell_bar_size_kb;
1255+
u8 unused_1;
12121256
u8 always_1;
12131257
__le32 reset_addr_poll;
12141258
u8 unused_2[3];
@@ -1363,7 +1407,11 @@ struct hwrm_func_qstats_input {
13631407
__le16 target_id;
13641408
__le64 resp_addr;
13651409
__le16 fid;
1366-
u8 unused_0[6];
1410+
u8 flags;
1411+
#define FUNC_QSTATS_REQ_FLAGS_UNUSED 0x0UL
1412+
#define FUNC_QSTATS_REQ_FLAGS_ROCE_ONLY 0x1UL
1413+
#define FUNC_QSTATS_REQ_FLAGS_LAST FUNC_QSTATS_REQ_FLAGS_ROCE_ONLY
1414+
u8 unused_0[5];
13671415
};
13681416

13691417
/* hwrm_func_qstats_output (size:1408b/176B) */
@@ -4714,7 +4762,7 @@ struct hwrm_vnic_free_output {
47144762
u8 valid;
47154763
};
47164764

4717-
/* hwrm_vnic_cfg_input (size:320b/40B) */
4765+
/* hwrm_vnic_cfg_input (size:384b/48B) */
47184766
struct hwrm_vnic_cfg_input {
47194767
__le16 req_type;
47204768
__le16 cmpl_ring;
@@ -4737,6 +4785,7 @@ struct hwrm_vnic_cfg_input {
47374785
#define VNIC_CFG_REQ_ENABLES_MRU 0x10UL
47384786
#define VNIC_CFG_REQ_ENABLES_DEFAULT_RX_RING_ID 0x20UL
47394787
#define VNIC_CFG_REQ_ENABLES_DEFAULT_CMPL_RING_ID 0x40UL
4788+
#define VNIC_CFG_REQ_ENABLES_QUEUE_ID 0x80UL
47404789
__le16 vnic_id;
47414790
__le16 dflt_ring_grp;
47424791
__le16 rss_rule;
@@ -4745,6 +4794,8 @@ struct hwrm_vnic_cfg_input {
47454794
__le16 mru;
47464795
__le16 default_rx_ring_id;
47474796
__le16 default_cmpl_ring_id;
4797+
__le16 queue_id;
4798+
u8 unused0[6];
47484799
};
47494800

47504801
/* hwrm_vnic_cfg_output (size:128b/16B) */
@@ -4785,6 +4836,7 @@ struct hwrm_vnic_qcaps_output {
47854836
#define VNIC_QCAPS_RESP_FLAGS_RSS_DFLT_CR_CAP 0x20UL
47864837
#define VNIC_QCAPS_RESP_FLAGS_ROCE_MIRRORING_CAPABLE_VNIC_CAP 0x40UL
47874838
#define VNIC_QCAPS_RESP_FLAGS_OUTERMOST_RSS_CAP 0x80UL
4839+
#define VNIC_QCAPS_RESP_FLAGS_COS_ASSIGNMENT_CAP 0x100UL
47884840
__le16 max_aggs_supported;
47894841
u8 unused_1[5];
47904842
u8 valid;
@@ -6794,15 +6846,16 @@ struct hwrm_fw_reset_input {
67946846
__le16 target_id;
67956847
__le64 resp_addr;
67966848
u8 embedded_proc_type;
6797-
#define FW_RESET_REQ_EMBEDDED_PROC_TYPE_BOOT 0x0UL
6798-
#define FW_RESET_REQ_EMBEDDED_PROC_TYPE_MGMT 0x1UL
6799-
#define FW_RESET_REQ_EMBEDDED_PROC_TYPE_NETCTRL 0x2UL
6800-
#define FW_RESET_REQ_EMBEDDED_PROC_TYPE_ROCE 0x3UL
6801-
#define FW_RESET_REQ_EMBEDDED_PROC_TYPE_HOST 0x4UL
6802-
#define FW_RESET_REQ_EMBEDDED_PROC_TYPE_AP 0x5UL
6803-
#define FW_RESET_REQ_EMBEDDED_PROC_TYPE_CHIP 0x6UL
6804-
#define FW_RESET_REQ_EMBEDDED_PROC_TYPE_HOST_RESOURCE_REINIT 0x7UL
6805-
#define FW_RESET_REQ_EMBEDDED_PROC_TYPE_LAST FW_RESET_REQ_EMBEDDED_PROC_TYPE_HOST_RESOURCE_REINIT
6849+
#define FW_RESET_REQ_EMBEDDED_PROC_TYPE_BOOT 0x0UL
6850+
#define FW_RESET_REQ_EMBEDDED_PROC_TYPE_MGMT 0x1UL
6851+
#define FW_RESET_REQ_EMBEDDED_PROC_TYPE_NETCTRL 0x2UL
6852+
#define FW_RESET_REQ_EMBEDDED_PROC_TYPE_ROCE 0x3UL
6853+
#define FW_RESET_REQ_EMBEDDED_PROC_TYPE_HOST 0x4UL
6854+
#define FW_RESET_REQ_EMBEDDED_PROC_TYPE_AP 0x5UL
6855+
#define FW_RESET_REQ_EMBEDDED_PROC_TYPE_CHIP 0x6UL
6856+
#define FW_RESET_REQ_EMBEDDED_PROC_TYPE_HOST_RESOURCE_REINIT 0x7UL
6857+
#define FW_RESET_REQ_EMBEDDED_PROC_TYPE_IMPACTLESS_ACTIVATION 0x8UL
6858+
#define FW_RESET_REQ_EMBEDDED_PROC_TYPE_LAST FW_RESET_REQ_EMBEDDED_PROC_TYPE_IMPACTLESS_ACTIVATION
68066859
u8 selfrst_status;
68076860
#define FW_RESET_REQ_SELFRST_STATUS_SELFRSTNONE 0x0UL
68086861
#define FW_RESET_REQ_SELFRST_STATUS_SELFRSTASAP 0x1UL
@@ -7125,7 +7178,14 @@ struct hwrm_temp_monitor_query_output {
71257178
__le16 seq_id;
71267179
__le16 resp_len;
71277180
u8 temp;
7128-
u8 unused_0[6];
7181+
u8 phy_temp;
7182+
u8 om_temp;
7183+
u8 flags;
7184+
#define TEMP_MONITOR_QUERY_RESP_FLAGS_TEMP_NOT_AVAILABLE 0x1UL
7185+
#define TEMP_MONITOR_QUERY_RESP_FLAGS_PHY_TEMP_NOT_AVAILABLE 0x2UL
7186+
#define TEMP_MONITOR_QUERY_RESP_FLAGS_OM_NOT_PRESENT 0x4UL
7187+
#define TEMP_MONITOR_QUERY_RESP_FLAGS_OM_TEMP_NOT_AVAILABLE 0x8UL
7188+
u8 unused_0[3];
71297189
u8 valid;
71307190
};
71317191

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