Skip to content

Commit 7642cc2

Browse files
Russell King (Oracle)davem330
authored andcommitted
net: phylink: fix PHY validation with rate adaption
Tim Harvey reports that link modes which he does not expect to be supported are being advertised, and this is because of the workaround we have for PHYs that switch interface modes. Fix this up by checking whether rate matching will be used for the requested interface mode, and if rate matching will be used, perform validation only with the requested interface mode, rather than invoking this workaround. Signed-off-by: Russell King (Oracle) <[email protected]> Signed-off-by: David S. Miller <[email protected]>
1 parent 9256db4 commit 7642cc2

File tree

1 file changed

+16
-6
lines changed

1 file changed

+16
-6
lines changed

drivers/net/phy/phylink.c

Lines changed: 16 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -1603,19 +1603,29 @@ static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy,
16031603
linkmode_copy(supported, phy->supported);
16041604
linkmode_copy(config.advertising, phy->advertising);
16051605

1606-
/* Clause 45 PHYs switch their Serdes lane between several different
1607-
* modes, normally 10GBASE-R, SGMII. Some use 2500BASE-X for 2.5G
1608-
* speeds. We really need to know which interface modes the PHY and
1609-
* MAC supports to properly work out which linkmodes can be supported.
1606+
/* Check whether we would use rate matching for the proposed interface
1607+
* mode.
16101608
*/
1611-
if (phy->is_c45 &&
1609+
config.rate_matching = phy_get_rate_matching(phy, interface);
1610+
1611+
/* Clause 45 PHYs may switch their Serdes lane between, e.g. 10GBASE-R,
1612+
* 5GBASE-R, 2500BASE-X and SGMII if they are not using rate matching.
1613+
* For some interface modes (e.g. RXAUI, XAUI and USXGMII) switching
1614+
* their Serdes is either unnecessary or not reasonable.
1615+
*
1616+
* For these which switch interface modes, we really need to know which
1617+
* interface modes the PHY supports to properly work out which ethtool
1618+
* linkmodes can be supported. For now, as a work-around, we validate
1619+
* against all interface modes, which may lead to more ethtool link
1620+
* modes being advertised than are actually supported.
1621+
*/
1622+
if (phy->is_c45 && config.rate_matching == RATE_MATCH_NONE &&
16121623
interface != PHY_INTERFACE_MODE_RXAUI &&
16131624
interface != PHY_INTERFACE_MODE_XAUI &&
16141625
interface != PHY_INTERFACE_MODE_USXGMII)
16151626
config.interface = PHY_INTERFACE_MODE_NA;
16161627
else
16171628
config.interface = interface;
1618-
config.rate_matching = phy_get_rate_matching(phy, config.interface);
16191629

16201630
ret = phylink_validate(pl, supported, &config);
16211631
if (ret) {

0 commit comments

Comments
 (0)