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Merge branch 'lan966x-driver'
Horatiu Vultur says: ==================== net: lan966x: Add lan966x switch driver This patch series add support for Microchip lan966x driver The lan966x switch is a multi-port Gigabit AVB/TSN Ethernet Switch with two integrated 10/100/1000Base-T PHYs. In addition to the integrated PHYs, it supports up to 2RGMII/RMII, up to 3BASE-X/SERDES/2.5GBASE-X and up to 2 Quad-SGMII/Quad-USGMII interfaces. Initially it adds support only for the ports to behave as simple NIC cards. In the future patches it would be extended with other functionality like Switchdev, PTP, Frame DMA, VCAP, etc. v4->v5: - more fixes to the reset of the switch, require all resources before activating the hardware - fix to lan966x-switch binding - implement get/set_pauseparam in ethtool_ops - stop calling lan966x_port_link_down when calling lan966x_port_pcs_set and call it in lan966x_phylink_mac_link_down v3->v4: - add timeouts when injecting/extracting frames, in case the HW breaks - simplify the creation of the IFH - fix the order of operations in lan966x_cleanup_ports - fixes to phylink based on Russel review v2->v3: - fix compiling issues for x86 - fix resource management in first patch v1->v2: - add new patch for MAINTAINERS - add functions lan966x_mac_cpu_learn/forget - fix build issues with second patch - fix the reset of the switch, return error if there is no reset controller - start to use phylink_mii_c22_pcs_decode_state and phylink_mii_c22_pcs_encode_advertisement to remove duplicate code ==================== Signed-off-by: David S. Miller <[email protected]>
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‎Documentation/devicetree/bindings/net/microchip,lan966x-switch.yaml

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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/net/microchip,lan966x-switch.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Microchip Lan966x Ethernet switch controller
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maintainers:
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- Horatiu Vultur <[email protected]>
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description: |
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The lan966x switch is a multi-port Gigabit AVB/TSN Ethernet Switch with
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two integrated 10/100/1000Base-T PHYs. In addition to the integrated PHYs,
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it supports up to 2RGMII/RMII, up to 3BASE-X/SERDES/2.5GBASE-X and up to
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2 Quad-SGMII/Quad-USGMII interfaces.
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properties:
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$nodename:
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pattern: "^switch@[0-9a-f]+$"
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compatible:
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const: microchip,lan966x-switch
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reg:
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items:
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- description: cpu target
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- description: general control block target
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reg-names:
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items:
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- const: cpu
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- const: gcb
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interrupts:
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minItems: 1
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items:
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- description: register based extraction
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- description: frame dma based extraction
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interrupt-names:
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minItems: 1
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items:
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- const: xtr
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- const: fdma
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resets:
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items:
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- description: Reset controller used for switch core reset (soft reset)
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- description: Reset controller used for releasing the phy from reset
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reset-names:
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items:
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- const: switch
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- const: phy
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ethernet-ports:
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type: object
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patternProperties:
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"^port@[0-9a-f]+$":
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type: object
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allOf:
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- $ref: "http://devicetree.org/schemas/net/ethernet-controller.yaml#"
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properties:
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'#address-cells':
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const: 1
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'#size-cells':
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const: 0
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reg:
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description:
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Switch port number
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phys:
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description:
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Phandle of a Ethernet SerDes PHY
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phy-mode:
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description:
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This specifies the interface used by the Ethernet SerDes towards
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the PHY or SFP.
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enum:
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- gmii
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- sgmii
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- qsgmii
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- 1000base-x
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- 2500base-x
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phy-handle:
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description:
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Phandle of a Ethernet PHY.
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sfp:
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description:
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Phandle of an SFP.
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managed: true
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required:
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- reg
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- phys
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- phy-mode
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oneOf:
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- required:
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- phy-handle
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- required:
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- sfp
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- managed
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required:
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- compatible
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- reg
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- reg-names
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- interrupts
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- interrupt-names
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- resets
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- reset-names
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- ethernet-ports
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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switch: switch@e0000000 {
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compatible = "microchip,lan966x-switch";
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reg = <0xe0000000 0x0100000>,
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<0xe2000000 0x0800000>;
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reg-names = "cpu", "gcb";
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interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "xtr";
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resets = <&switch_reset 0>, <&phy_reset 0>;
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reset-names = "switch", "phy";
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ethernet-ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port0: port@0 {
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reg = <0>;
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phy-handle = <&phy0>;
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phys = <&serdes 0 0>;
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phy-mode = "gmii";
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};
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port1: port@1 {
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reg = <1>;
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sfp = <&sfp_eth1>;
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managed = "in-band-status";
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phys = <&serdes 2 4>;
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phy-mode = "sgmii";
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};
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};
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};
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...

‎MAINTAINERS

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S: Maintained
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F: drivers/net/ethernet/microchip/lan743x_*
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MICROCHIP LAN966X ETHERNET DRIVER
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M: Horatiu Vultur <[email protected]>
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M: [email protected]
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L: [email protected]
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S: Maintained
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F: drivers/net/ethernet/microchip/lan966x/*
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MICROCHIP LCDFB DRIVER
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M: Nicolas Ferre <[email protected]>
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L: [email protected]

‎drivers/net/ethernet/microchip/Kconfig

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To compile this driver as a module, choose M here. The module will be
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called lan743x.
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source "drivers/net/ethernet/microchip/lan966x/Kconfig"
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source "drivers/net/ethernet/microchip/sparx5/Kconfig"
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endif # NET_VENDOR_MICROCHIP

‎drivers/net/ethernet/microchip/Makefile

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lan743x-objs := lan743x_main.o lan743x_ethtool.o lan743x_ptp.o
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obj-$(CONFIG_LAN966X_SWITCH) += lan966x/
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obj-$(CONFIG_SPARX5_SWITCH) += sparx5/

‎drivers/net/ethernet/microchip/lan966x/Kconfig

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config LAN966X_SWITCH
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tristate "Lan966x switch driver"
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depends on HAS_IOMEM
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depends on OF
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select PHYLINK
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help
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This driver supports the Lan966x network switch device.

‎drivers/net/ethernet/microchip/lan966x/Makefile

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# SPDX-License-Identifier: GPL-2.0-only
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#
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# Makefile for the Microchip Lan966x network device drivers.
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#
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obj-$(CONFIG_LAN966X_SWITCH) += lan966x-switch.o
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lan966x-switch-objs := lan966x_main.o lan966x_phylink.o lan966x_port.o \
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lan966x_mac.o lan966x_ethtool.o

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