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misc: mic: SCIF header file and IOCTL interface
This patch introduces the SCIF documentation in the header file and describes the IOCTL interface for user mode. mic_overview.txt is updated with documentation on SCIF and a new document describing SCIF in more details is available in scif_overview.txt. Reviewed-by: Nikhil Rao <[email protected]> Reviewed-by: Ashutosh Dixit <[email protected]> Signed-off-by: Sudeep Dutt <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
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‎Documentation/mic/mic_overview.txt

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@@ -24,6 +24,10 @@ a virtual bus called mic bus is created and virtual dma devices are
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created on it by the host/card drivers. On host the channels are private
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and used only by the host driver to transfer data for the virtio devices.
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The Symmetric Communication Interface (SCIF (pronounced as skiff)) is a
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low level communications API across PCIe currently implemented for MIC.
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More details are available at scif_overview.txt.
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Here is a block diagram of the various components described above. The
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virtio backends are situated on the host rather than the card given better
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single threaded performance for the host compared to MIC, the ability of
@@ -47,18 +51,18 @@ the fact that the virtio block storage backend can only be on the host.
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| | | Virtio over PCIe IOCTLs |
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| | +--------------------------+
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+-----------+ | | | +-----------+
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| MIC DMA | | | | | MIC DMA |
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| Driver | | | | | Driver |
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+-----------+ | | | +-----------+
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| | | | |
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+---------------+ | | | +----------------+
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|MIC virtual Bus| | | | |MIC virtual Bus |
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+---------------+ | | | +----------------+
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| | | | |
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| +--------------+ | +---------------+ |
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| |Intel MIC | | |Intel MIC | |
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+---|Card Driver | | |Host Driver | |
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+--------------+ | +---------------+-----+
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| MIC DMA | | +----------+ | +-----------+ | | MIC DMA |
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| Driver | | | SCIF | | | SCIF | | | Driver |
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+-----------+ | +----------+ | +-----------+ | +-----------+
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| | | | | | |
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+---------------+ | +-----+-----+ | +-----+-----+ | +---------------+
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|MIC virtual Bus| | |SCIF HW Bus| | |SCIF HW BUS| | |MIC virtual Bus|
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+---------------+ | +-----------+ | +-----+-----+ | +---------------+
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| | | | | | |
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| +--------------+ | | | +---------------+ |
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| |Intel MIC | | | | |Intel MIC | |
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+---|Card Driver +----+ | | |Host Driver | |
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+--------------+ | +----+---------------+-----+
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| | |
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+-------------------------------------------------------------+
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| |

‎Documentation/mic/scif_overview.txt

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The Symmetric Communication Interface (SCIF (pronounced as skiff)) is a low
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level communications API across PCIe currently implemented for MIC. Currently
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SCIF provides inter-node communication within a single host platform, where a
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node is a MIC Coprocessor or Xeon based host. SCIF abstracts the details of
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communicating over the PCIe bus while providing an API that is symmetric
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across all the nodes in the PCIe network. An important design objective for SCIF
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is to deliver the maximum possible performance given the communication
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abilities of the hardware. SCIF has been used to implement an offload compiler
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runtime and OFED support for MPI implementations for MIC coprocessors.
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==== SCIF API Components ====
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The SCIF API has the following parts:
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1. Connection establishment using a client server model
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2. Byte stream messaging intended for short messages
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3. Node enumeration to determine online nodes
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4. Poll semantics for detection of incoming connections and messages
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5. Memory registration to pin down pages
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6. Remote memory mapping for low latency CPU accesses via mmap
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7. Remote DMA (RDMA) for high bandwidth DMA transfers
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8. Fence APIs for RDMA synchronization
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SCIF exposes the notion of a connection which can be used by peer processes on
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nodes in a SCIF PCIe "network" to share memory "windows" and to communicate. A
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process in a SCIF node initiates a SCIF connection to a peer process on a
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different node via a SCIF "endpoint". SCIF endpoints support messaging APIs
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which are similar to connection oriented socket APIs. Connected SCIF endpoints
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can also register local memory which is followed by data transfer using either
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DMA, CPU copies or remote memory mapping via mmap. SCIF supports both user and
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kernel mode clients which are functionally equivalent.
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==== SCIF Performance for MIC ====
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DMA bandwidth comparison between the TCP (over ethernet over PCIe) stack versus
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SCIF shows the performance advantages of SCIF for HPC applications and runtimes.
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Comparison of TCP and SCIF based BW
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Throughput (GB/sec)
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8 + PCIe Bandwidth ******
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+ TCP ######
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7 + ************************************** SCIF %%%%%%
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| %%%%%%%%%%%%%%%%%%%
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6 + %%%%
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| %%
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| %%%
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5 + %%
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| %%
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4 + %%
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| %%
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3 + %%
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| %
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2 + %%
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| %%
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| %
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1 +
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+ ######################################
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0 +++---+++--+--+-+--+--+-++-+--+-++-+--+-++-+-
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1 10 100 1000 10000 100000
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Transfer Size (KBytes)
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SCIF allows memory sharing via mmap(..) between processes on different PCIe
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nodes and thus provides bare-metal PCIe latency. The round trip SCIF mmap
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latency from the host to an x100 MIC for an 8 byte message is 0.44 usecs.
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SCIF has a user space library which is a thin IOCTL wrapper providing a user
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space API similar to the kernel API in scif.h. The SCIF user space library
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is distributed @ https://software.intel.com/en-us/mic-developer
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Here is some pseudo code for an example of how two applications on two PCIe
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nodes would typically use the SCIF API:
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Process A (on node A) Process B (on node B)
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/* get online node information */
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scif_get_node_ids(..) scif_get_node_ids(..)
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scif_open(..) scif_open(..)
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scif_bind(..) scif_bind(..)
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scif_listen(..)
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scif_accept(..) scif_connect(..)
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/* SCIF connection established */
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/* Send and receive short messages */
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scif_send(..)/scif_recv(..) scif_send(..)/scif_recv(..)
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/* Register memory */
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scif_register(..) scif_register(..)
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/* RDMA */
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scif_readfrom(..)/scif_writeto(..) scif_readfrom(..)/scif_writeto(..)
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/* Fence DMAs */
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scif_fence_signal(..) scif_fence_signal(..)
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mmap(..) mmap(..)
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/* Access remote registered memory */
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/* Close the endpoints */
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scif_close(..) scif_close(..)

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