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refactormanJeff Kirsher
refactorman
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Jeff Kirsher
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ice: Add support for control queues
A control queue is a hardware interface which is used by the driver to interact with other subsystems (like firmware, PHY, etc.). It is implemented as a producer-consumer ring. More specifically, an "admin queue" is a type of control queue used to interact with the firmware. This patch introduces data structures and functions to initialize and teardown control/admin queues. Once the admin queue is initialized, the driver uses it to get the firmware version. Signed-off-by: Anirudh Venkataramanan <[email protected]> Tested-by: Tony Brelinski <[email protected]> Signed-off-by: Jeff Kirsher <[email protected]>
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‎drivers/net/ethernet/intel/ice/Makefile

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@@ -7,4 +7,6 @@
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obj-$(CONFIG_ICE) += ice.o
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ice-y := ice_main.o
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ice-y := ice_main.o \
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ice_controlq.o \
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ice_common.o

‎drivers/net/ethernet/intel/ice/ice.h

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#include <linux/compiler.h>
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#include <linux/pci.h>
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#include <linux/aer.h>
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#include <linux/delay.h>
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#include <linux/bitmap.h>
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#include "ice_devids.h"
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#include "ice_type.h"

‎drivers/net/ethernet/intel/ice/ice_adminq_cmd.h

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/* SPDX-License-Identifier: GPL-2.0 */
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/* Copyright (c) 2018, Intel Corporation. */
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#ifndef _ICE_ADMINQ_CMD_H_
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#define _ICE_ADMINQ_CMD_H_
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/* This header file defines the Admin Queue commands, error codes and
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* descriptor format. It is shared between Firmware and Software.
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*/
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struct ice_aqc_generic {
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__le32 param0;
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__le32 param1;
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__le32 addr_high;
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__le32 addr_low;
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};
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/* Get version (direct 0x0001) */
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struct ice_aqc_get_ver {
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__le32 rom_ver;
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__le32 fw_build;
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u8 fw_branch;
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u8 fw_major;
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u8 fw_minor;
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u8 fw_patch;
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u8 api_branch;
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u8 api_major;
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u8 api_minor;
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u8 api_patch;
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};
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/* Queue Shutdown (direct 0x0003) */
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struct ice_aqc_q_shutdown {
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#define ICE_AQC_DRIVER_UNLOADING BIT(0)
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__le32 driver_unloading;
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u8 reserved[12];
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};
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/**
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* struct ice_aq_desc - Admin Queue (AQ) descriptor
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* @flags: ICE_AQ_FLAG_* flags
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* @opcode: AQ command opcode
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* @datalen: length in bytes of indirect/external data buffer
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* @retval: return value from firmware
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* @cookie_h: opaque data high-half
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* @cookie_l: opaque data low-half
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* @params: command-specific parameters
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*
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* Descriptor format for commands the driver posts on the Admin Transmit Queue
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* (ATQ). The firmware writes back onto the command descriptor and returns
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* the result of the command. Asynchronous events that are not an immediate
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* result of the command are written to the Admin Receive Queue (ARQ) using
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* the same descriptor format. Descriptors are in little-endian notation with
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* 32-bit words.
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*/
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struct ice_aq_desc {
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__le16 flags;
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__le16 opcode;
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__le16 datalen;
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__le16 retval;
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__le32 cookie_high;
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__le32 cookie_low;
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union {
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u8 raw[16];
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struct ice_aqc_generic generic;
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struct ice_aqc_get_ver get_ver;
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struct ice_aqc_q_shutdown q_shutdown;
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} params;
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};
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/* FW defined boundary for a large buffer, 4k >= Large buffer > 512 bytes */
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#define ICE_AQ_LG_BUF 512
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#define ICE_AQ_FLAG_LB_S 9
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#define ICE_AQ_FLAG_BUF_S 12
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#define ICE_AQ_FLAG_SI_S 13
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#define ICE_AQ_FLAG_LB BIT(ICE_AQ_FLAG_LB_S) /* 0x200 */
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#define ICE_AQ_FLAG_BUF BIT(ICE_AQ_FLAG_BUF_S) /* 0x1000 */
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#define ICE_AQ_FLAG_SI BIT(ICE_AQ_FLAG_SI_S) /* 0x2000 */
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/* error codes */
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enum ice_aq_err {
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ICE_AQ_RC_OK = 0, /* success */
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};
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/* Admin Queue command opcodes */
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enum ice_adminq_opc {
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/* AQ commands */
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ice_aqc_opc_get_ver = 0x0001,
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ice_aqc_opc_q_shutdown = 0x0003,
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};
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#endif /* _ICE_ADMINQ_CMD_H_ */

‎drivers/net/ethernet/intel/ice/ice_common.c

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// SPDX-License-Identifier: GPL-2.0
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/* Copyright (c) 2018, Intel Corporation. */
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#include "ice_common.h"
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#include "ice_adminq_cmd.h"
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/**
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* ice_debug_cq
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* @hw: pointer to the hardware structure
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* @mask: debug mask
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* @desc: pointer to control queue descriptor
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* @buf: pointer to command buffer
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* @buf_len: max length of buf
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*
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* Dumps debug log about control command with descriptor contents.
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*/
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void ice_debug_cq(struct ice_hw *hw, u32 __maybe_unused mask, void *desc,
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void *buf, u16 buf_len)
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{
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struct ice_aq_desc *cq_desc = (struct ice_aq_desc *)desc;
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u16 len;
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#ifndef CONFIG_DYNAMIC_DEBUG
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if (!(mask & hw->debug_mask))
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return;
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#endif
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if (!desc)
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return;
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len = le16_to_cpu(cq_desc->datalen);
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ice_debug(hw, mask,
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"CQ CMD: opcode 0x%04X, flags 0x%04X, datalen 0x%04X, retval 0x%04X\n",
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le16_to_cpu(cq_desc->opcode),
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le16_to_cpu(cq_desc->flags),
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le16_to_cpu(cq_desc->datalen), le16_to_cpu(cq_desc->retval));
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ice_debug(hw, mask, "\tcookie (h,l) 0x%08X 0x%08X\n",
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le32_to_cpu(cq_desc->cookie_high),
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le32_to_cpu(cq_desc->cookie_low));
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ice_debug(hw, mask, "\tparam (0,1) 0x%08X 0x%08X\n",
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le32_to_cpu(cq_desc->params.generic.param0),
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le32_to_cpu(cq_desc->params.generic.param1));
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ice_debug(hw, mask, "\taddr (h,l) 0x%08X 0x%08X\n",
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le32_to_cpu(cq_desc->params.generic.addr_high),
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le32_to_cpu(cq_desc->params.generic.addr_low));
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if (buf && cq_desc->datalen != 0) {
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ice_debug(hw, mask, "Buffer:\n");
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if (buf_len < len)
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len = buf_len;
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ice_debug_array(hw, mask, 16, 1, (u8 *)buf, len);
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}
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}
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/* FW Admin Queue command wrappers */
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/**
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* ice_aq_send_cmd - send FW Admin Queue command to FW Admin Queue
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* @hw: pointer to the hw struct
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* @desc: descriptor describing the command
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* @buf: buffer to use for indirect commands (NULL for direct commands)
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* @buf_size: size of buffer for indirect commands (0 for direct commands)
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* @cd: pointer to command details structure
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*
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* Helper function to send FW Admin Queue commands to the FW Admin Queue.
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*/
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enum ice_status
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ice_aq_send_cmd(struct ice_hw *hw, struct ice_aq_desc *desc, void *buf,
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u16 buf_size, struct ice_sq_cd *cd)
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{
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return ice_sq_send_cmd(hw, &hw->adminq, desc, buf, buf_size, cd);
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}
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/**
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* ice_aq_get_fw_ver
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* @hw: pointer to the hw struct
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* @cd: pointer to command details structure or NULL
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*
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* Get the firmware version (0x0001) from the admin queue commands
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*/
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enum ice_status ice_aq_get_fw_ver(struct ice_hw *hw, struct ice_sq_cd *cd)
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{
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struct ice_aqc_get_ver *resp;
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struct ice_aq_desc desc;
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enum ice_status status;
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resp = &desc.params.get_ver;
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ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_ver);
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status = ice_aq_send_cmd(hw, &desc, NULL, 0, cd);
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if (!status) {
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hw->fw_branch = resp->fw_branch;
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hw->fw_maj_ver = resp->fw_major;
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hw->fw_min_ver = resp->fw_minor;
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hw->fw_patch = resp->fw_patch;
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hw->fw_build = le32_to_cpu(resp->fw_build);
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hw->api_branch = resp->api_branch;
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hw->api_maj_ver = resp->api_major;
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hw->api_min_ver = resp->api_minor;
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hw->api_patch = resp->api_patch;
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}
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return status;
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}
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/**
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* ice_aq_q_shutdown
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* @hw: pointer to the hw struct
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* @unloading: is the driver unloading itself
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*
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* Tell the Firmware that we're shutting down the AdminQ and whether
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* or not the driver is unloading as well (0x0003).
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*/
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enum ice_status ice_aq_q_shutdown(struct ice_hw *hw, bool unloading)
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{
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struct ice_aqc_q_shutdown *cmd;
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struct ice_aq_desc desc;
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cmd = &desc.params.q_shutdown;
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ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_q_shutdown);
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if (unloading)
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cmd->driver_unloading = cpu_to_le32(ICE_AQC_DRIVER_UNLOADING);
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return ice_aq_send_cmd(hw, &desc, NULL, 0, NULL);
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}

‎drivers/net/ethernet/intel/ice/ice_common.h

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/* SPDX-License-Identifier: GPL-2.0 */
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/* Copyright (c) 2018, Intel Corporation. */
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#ifndef _ICE_COMMON_H_
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#define _ICE_COMMON_H_
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#include "ice.h"
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#include "ice_type.h"
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void ice_debug_cq(struct ice_hw *hw, u32 mask, void *desc, void *buf,
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u16 buf_len);
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enum ice_status ice_init_all_ctrlq(struct ice_hw *hw);
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void ice_shutdown_all_ctrlq(struct ice_hw *hw);
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enum ice_status
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ice_sq_send_cmd(struct ice_hw *hw, struct ice_ctl_q_info *cq,
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struct ice_aq_desc *desc, void *buf, u16 buf_size,
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struct ice_sq_cd *cd);
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bool ice_check_sq_alive(struct ice_hw *hw, struct ice_ctl_q_info *cq);
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enum ice_status ice_aq_q_shutdown(struct ice_hw *hw, bool unloading);
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void ice_fill_dflt_direct_cmd_desc(struct ice_aq_desc *desc, u16 opcode);
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enum ice_status
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ice_aq_send_cmd(struct ice_hw *hw, struct ice_aq_desc *desc,
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void *buf, u16 buf_size, struct ice_sq_cd *cd);
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enum ice_status ice_aq_get_fw_ver(struct ice_hw *hw, struct ice_sq_cd *cd);
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#endif /* _ICE_COMMON_H_ */

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