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Merge branch 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull core timer updates from Thomas Gleixner: "Timers and timekeeping updates: - A large overhaul of the posix CPU timer code which is a preparation for moving the CPU timer expiry out into task work so it can be properly accounted on the task/process. An update to the bogus permission checks will come later during the merge window as feedback was not complete before heading of for travel. - Switch the timerqueue code to use cached rbtrees and get rid of the homebrewn caching of the leftmost node. - Consolidate hrtimer_init() + hrtimer_init_sleeper() calls into a single function - Implement the separation of hrtimers to be forced to expire in hard interrupt context even when PREEMPT_RT is enabled and mark the affected timers accordingly. - Implement a mechanism for hrtimers and the timer wheel to protect RT against priority inversion and live lock issues when a (hr)timer which should be canceled is currently executing the callback. Instead of infinitely spinning, the task which tries to cancel the timer blocks on a per cpu base expiry lock which is held and released by the (hr)timer expiry code. - Enable the Hyper-V TSC page based sched_clock for Hyper-V guests resulting in faster access to timekeeping functions. - Updates to various clocksource/clockevent drivers and their device tree bindings. - The usual small improvements all over the place" * 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (101 commits) posix-cpu-timers: Fix permission check regression posix-cpu-timers: Always clear head pointer on dequeue hrtimer: Add a missing bracket and hide `migration_base' on !SMP posix-cpu-timers: Make expiry_active check actually work correctly posix-timers: Unbreak CONFIG_POSIX_TIMERS=n build tick: Mark sched_timer to expire in hard interrupt context hrtimer: Add kernel doc annotation for HRTIMER_MODE_HARD x86/hyperv: Hide pv_ops access for CONFIG_PARAVIRT=n posix-cpu-timers: Utilize timerqueue for storage posix-cpu-timers: Move state tracking to struct posix_cputimers posix-cpu-timers: Deduplicate rlimit handling posix-cpu-timers: Remove pointless comparisons posix-cpu-timers: Get rid of 64bit divisions posix-cpu-timers: Consolidate timer expiry further posix-cpu-timers: Get rid of zero checks rlimit: Rewrite non-sensical RLIMIT_CPU comment posix-cpu-timers: Respect INFINITY for hard RTTIME limit posix-cpu-timers: Switch thread group sampling to array posix-cpu-timers: Restructure expiry array posix-cpu-timers: Remove cputime_expires ...
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‎Documentation/devicetree/bindings/timer/allwinner,sun4i-a10-timer.yaml

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# SPDX-License-Identifier: GPL-2.0
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/timer/allwinner,sun4i-a10-timer.yaml#
5+
$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Allwinner A10 Timer Device Tree Bindings
8+
9+
maintainers:
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- Chen-Yu Tsai <[email protected]>
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- Maxime Ripard <[email protected]>
12+
13+
properties:
14+
compatible:
15+
enum:
16+
- allwinner,sun4i-a10-timer
17+
- allwinner,sun8i-a23-timer
18+
- allwinner,sun8i-v3s-timer
19+
- allwinner,suniv-f1c100s-timer
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reg:
22+
maxItems: 1
23+
24+
interrupts:
25+
description:
26+
List of timers interrupts
27+
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clocks:
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maxItems: 1
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allOf:
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- if:
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properties:
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compatible:
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items:
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const: allwinner,sun4i-a10-timer
37+
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then:
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properties:
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interrupts:
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minItems: 6
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maxItems: 6
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- if:
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properties:
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compatible:
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items:
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const: allwinner,sun8i-a23-timer
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then:
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properties:
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interrupts:
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minItems: 2
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maxItems: 2
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- if:
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properties:
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compatible:
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items:
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const: allwinner,sun8i-v3s-timer
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then:
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properties:
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interrupts:
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minItems: 3
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maxItems: 3
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- if:
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properties:
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compatible:
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items:
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const: allwinner,suniv-f1c100s-timer
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then:
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properties:
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interrupts:
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minItems: 3
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maxItems: 3
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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additionalProperties: false
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examples:
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- |
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timer {
91+
compatible = "allwinner,sun4i-a10-timer";
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reg = <0x01c20c00 0x400>;
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interrupts = <22>,
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<23>,
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<24>,
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<25>,
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<67>,
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<68>;
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clocks = <&osc>;
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};
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...

‎Documentation/devicetree/bindings/timer/allwinner,sun4i-timer.txt

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This file was deleted.

‎Documentation/devicetree/bindings/timer/allwinner,sun5i-a13-hstimer.txt

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This file was deleted.

‎Documentation/devicetree/bindings/timer/allwinner,sun5i-a13-hstimer.yaml

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# SPDX-License-Identifier: GPL-2.0
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/timer/allwinner,sun5i-a13-hstimer.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Allwinner A13 High-Speed Timer Device Tree Bindings
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maintainers:
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- Chen-Yu Tsai <[email protected]>
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- Maxime Ripard <[email protected]>
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properties:
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compatible:
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oneOf:
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- const: allwinner,sun5i-a13-hstimer
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- const: allwinner,sun7i-a20-hstimer
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- items:
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- const: allwinner,sun6i-a31-hstimer
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- const: allwinner,sun7i-a20-hstimer
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reg:
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maxItems: 1
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interrupts:
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minItems: 2
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maxItems: 4
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items:
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- description: Timer 0 Interrupt
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- description: Timer 1 Interrupt
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- description: Timer 2 Interrupt
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- description: Timer 3 Interrupt
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clocks:
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maxItems: 1
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resets:
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maxItems: 1
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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if:
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properties:
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compatible:
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items:
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const: allwinner,sun5i-a13-hstimer
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then:
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properties:
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interrupts:
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minItems: 2
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maxItems: 2
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else:
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properties:
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interrupts:
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minItems: 4
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maxItems: 4
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additionalProperties: false
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examples:
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- |
68+
timer@1c60000 {
69+
compatible = "allwinner,sun7i-a20-hstimer";
70+
reg = <0x01c60000 0x1000>;
71+
interrupts = <0 51 1>,
72+
<0 52 1>,
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<0 53 1>,
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<0 54 1>;
75+
clocks = <&ahb1_gates 19>;
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resets = <&ahb1rst 19>;
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};
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...

‎Documentation/devicetree/bindings/timer/renesas,cmt.txt

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@@ -12,16 +12,13 @@ datasheets.
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Required Properties:
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- compatible: must contain one or more of the following:
15-
- "renesas,cmt-48-sh73a0" for the sh73A0 48-bit CMT
16-
(CMT1)
17-
- "renesas,cmt-48-r8a7740" for the r8a7740 48-bit CMT
18-
(CMT1)
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- "renesas,cmt-48" for all non-second generation 48-bit CMT
20-
(CMT1 on sh73a0 and r8a7740)
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This is a fallback for the above renesas,cmt-48-* entries.
22-
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- "renesas,r8a73a4-cmt0" for the 32-bit CMT0 device included in r8a73a4.
2416
- "renesas,r8a73a4-cmt1" for the 48-bit CMT1 device included in r8a73a4.
17+
- "renesas,r8a7740-cmt0" for the 32-bit CMT0 device included in r8a7740.
18+
- "renesas,r8a7740-cmt1" for the 48-bit CMT1 device included in r8a7740.
19+
- "renesas,r8a7740-cmt2" for the 32-bit CMT2 device included in r8a7740.
20+
- "renesas,r8a7740-cmt3" for the 32-bit CMT3 device included in r8a7740.
21+
- "renesas,r8a7740-cmt4" for the 32-bit CMT4 device included in r8a7740.
2522
- "renesas,r8a7743-cmt0" for the 32-bit CMT0 device included in r8a7743.
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- "renesas,r8a7743-cmt1" for the 48-bit CMT1 device included in r8a7743.
2724
- "renesas,r8a7744-cmt0" for the 32-bit CMT0 device included in r8a7744.
@@ -31,29 +28,38 @@ Required Properties:
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- "renesas,r8a77470-cmt0" for the 32-bit CMT0 device included in r8a77470.
3229
- "renesas,r8a77470-cmt1" for the 48-bit CMT1 device included in r8a77470.
3330
- "renesas,r8a774a1-cmt0" for the 32-bit CMT0 device included in r8a774a1.
34-
- "renesas,r8a774a1-cmt1" for the 48-bit CMT1 device included in r8a774a1.
31+
- "renesas,r8a774a1-cmt1" for the 48-bit CMT devices included in r8a774a1.
3532
- "renesas,r8a774c0-cmt0" for the 32-bit CMT0 device included in r8a774c0.
36-
- "renesas,r8a774c0-cmt1" for the 48-bit CMT1 device included in r8a774c0.
33+
- "renesas,r8a774c0-cmt1" for the 48-bit CMT devices included in r8a774c0.
3734
- "renesas,r8a7790-cmt0" for the 32-bit CMT0 device included in r8a7790.
3835
- "renesas,r8a7790-cmt1" for the 48-bit CMT1 device included in r8a7790.
3936
- "renesas,r8a7791-cmt0" for the 32-bit CMT0 device included in r8a7791.
4037
- "renesas,r8a7791-cmt1" for the 48-bit CMT1 device included in r8a7791.
38+
- "renesas,r8a7792-cmt0" for the 32-bit CMT0 device included in r8a7792.
39+
- "renesas,r8a7792-cmt1" for the 48-bit CMT1 device included in r8a7792.
4140
- "renesas,r8a7793-cmt0" for the 32-bit CMT0 device included in r8a7793.
4241
- "renesas,r8a7793-cmt1" for the 48-bit CMT1 device included in r8a7793.
4342
- "renesas,r8a7794-cmt0" for the 32-bit CMT0 device included in r8a7794.
4443
- "renesas,r8a7794-cmt1" for the 48-bit CMT1 device included in r8a7794.
4544
- "renesas,r8a7795-cmt0" for the 32-bit CMT0 device included in r8a7795.
46-
- "renesas,r8a7795-cmt1" for the 48-bit CMT1 device included in r8a7795.
45+
- "renesas,r8a7795-cmt1" for the 48-bit CMT devices included in r8a7795.
4746
- "renesas,r8a7796-cmt0" for the 32-bit CMT0 device included in r8a7796.
48-
- "renesas,r8a7796-cmt1" for the 48-bit CMT1 device included in r8a7796.
47+
- "renesas,r8a7796-cmt1" for the 48-bit CMT devices included in r8a7796.
4948
- "renesas,r8a77965-cmt0" for the 32-bit CMT0 device included in r8a77965.
50-
- "renesas,r8a77965-cmt1" for the 48-bit CMT1 device included in r8a77965.
49+
- "renesas,r8a77965-cmt1" for the 48-bit CMT devices included in r8a77965.
5150
- "renesas,r8a77970-cmt0" for the 32-bit CMT0 device included in r8a77970.
52-
- "renesas,r8a77970-cmt1" for the 48-bit CMT1 device included in r8a77970.
51+
- "renesas,r8a77970-cmt1" for the 48-bit CMT devices included in r8a77970.
5352
- "renesas,r8a77980-cmt0" for the 32-bit CMT0 device included in r8a77980.
54-
- "renesas,r8a77980-cmt1" for the 48-bit CMT1 device included in r8a77980.
53+
- "renesas,r8a77980-cmt1" for the 48-bit CMT devices included in r8a77980.
5554
- "renesas,r8a77990-cmt0" for the 32-bit CMT0 device included in r8a77990.
56-
- "renesas,r8a77990-cmt1" for the 48-bit CMT1 device included in r8a77990.
55+
- "renesas,r8a77990-cmt1" for the 48-bit CMT devices included in r8a77990.
56+
- "renesas,r8a77995-cmt0" for the 32-bit CMT0 device included in r8a77995.
57+
- "renesas,r8a77995-cmt1" for the 48-bit CMT devices included in r8a77995.
58+
- "renesas,sh73a0-cmt0" for the 32-bit CMT0 device included in sh73a0.
59+
- "renesas,sh73a0-cmt1" for the 48-bit CMT1 device included in sh73a0.
60+
- "renesas,sh73a0-cmt2" for the 32-bit CMT2 device included in sh73a0.
61+
- "renesas,sh73a0-cmt3" for the 32-bit CMT3 device included in sh73a0.
62+
- "renesas,sh73a0-cmt4" for the 32-bit CMT4 device included in sh73a0.
5763

5864
- "renesas,rcar-gen2-cmt0" for 32-bit CMT0 devices included in R-Car Gen2
5965
and RZ/G1.
@@ -63,7 +69,7 @@ Required Properties:
6369
listed above.
6470
- "renesas,rcar-gen3-cmt0" for 32-bit CMT0 devices included in R-Car Gen3
6571
and RZ/G2.
66-
- "renesas,rcar-gen3-cmt1" for 48-bit CMT1 devices included in R-Car Gen3
72+
- "renesas,rcar-gen3-cmt1" for 48-bit CMT devices included in R-Car Gen3
6773
and RZ/G2.
6874
These are fallbacks for R-Car Gen3 and RZ/G2 entries listed
6975
above.

‎arch/arm64/boot/dts/freescale/imx8mm.dtsi

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@@ -546,6 +546,14 @@
546546
#pwm-cells = <2>;
547547
status = "disabled";
548548
};
549+
550+
system_counter: timer@306a0000 {
551+
compatible = "nxp,sysctr-timer";
552+
reg = <0x306a0000 0x20000>;
553+
interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
554+
clocks = <&osc_24m>;
555+
clock-names = "per";
556+
};
549557
};
550558

551559
aips3: bus@30800000 {

‎arch/arm64/boot/dts/freescale/imx8mq.dtsi

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -651,6 +651,14 @@
651651
#pwm-cells = <2>;
652652
status = "disabled";
653653
};
654+
655+
system_counter: timer@306a0000 {
656+
compatible = "nxp,sysctr-timer";
657+
reg = <0x306a0000 0x20000>;
658+
interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
659+
clocks = <&osc_25m>;
660+
clock-names = "per";
661+
};
654662
};
655663

656664
bus@30800000 { /* AIPS3 */

‎arch/x86/entry/vdso/vma.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -122,7 +122,7 @@ static vm_fault_t vvar_fault(const struct vm_special_mapping *sm,
122122

123123
if (tsc_pg && vclock_was_used(VCLOCK_HVCLOCK))
124124
return vmf_insert_pfn(vma, vmf->address,
125-
vmalloc_to_pfn(tsc_pg));
125+
virt_to_phys(tsc_pg) >> PAGE_SHIFT);
126126
}
127127

128128
return VM_FAULT_SIGBUS;

‎arch/x86/hyperv/hv_init.c

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@@ -315,8 +315,6 @@ void __init hyperv_init(void)
315315

316316
x86_init.pci.arch_init = hv_pci_init;
317317

318-
/* Register Hyper-V specific clocksource */
319-
hv_init_clocksource();
320318
return;
321319

322320
remove_cpuhp_state:

‎arch/x86/include/asm/vdso/gettimeofday.h

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -51,7 +51,7 @@ extern struct pvclock_vsyscall_time_info pvclock_page
5151
__attribute__((visibility("hidden")));
5252
#endif
5353

54-
#ifdef CONFIG_HYPERV_TSCPAGE
54+
#ifdef CONFIG_HYPERV_TIMER
5555
extern struct ms_hyperv_tsc_page hvclock_page
5656
__attribute__((visibility("hidden")));
5757
#endif
@@ -228,7 +228,7 @@ static u64 vread_pvclock(void)
228228
}
229229
#endif
230230

231-
#ifdef CONFIG_HYPERV_TSCPAGE
231+
#ifdef CONFIG_HYPERV_TIMER
232232
static u64 vread_hvclock(void)
233233
{
234234
return hv_read_tsc_page(&hvclock_page);
@@ -251,7 +251,7 @@ static inline u64 __arch_get_hw_counter(s32 clock_mode)
251251
return vread_pvclock();
252252
}
253253
#endif
254-
#ifdef CONFIG_HYPERV_TSCPAGE
254+
#ifdef CONFIG_HYPERV_TIMER
255255
if (clock_mode == VCLOCK_HVCLOCK) {
256256
barrier();
257257
return vread_hvclock();

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