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Lina IyerMarc Zyngier
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irqchip/qcom-pdc: Add irqdomain for wakeup capable GPIOs
Introduce a new domain for wakeup capable GPIOs. The domain can be requested using the bus token DOMAIN_BUS_WAKEUP. In the following patches, we will specify PDC as the wakeup-parent for the TLMM GPIO irqchip. Requesting a wakeup GPIO will setup the GPIO and the corresponding PDC interrupt as its parent. Co-developed-by: Stephen Boyd <[email protected]> Signed-off-by: Stephen Boyd <[email protected]> Signed-off-by: Lina Iyer <[email protected]> Signed-off-by: Marc Zyngier <[email protected]> Reviewed-by: Stephen Boyd <[email protected]> Link: https://lore.kernel.org/r/[email protected]
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+116
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drivers/irqchip/qcom-pdc.c

Lines changed: 95 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -13,19 +13,22 @@
1313
#include <linux/of.h>
1414
#include <linux/of_address.h>
1515
#include <linux/of_device.h>
16+
#include <linux/soc/qcom/irq.h>
1617
#include <linux/spinlock.h>
17-
#include <linux/platform_device.h>
1818
#include <linux/slab.h>
1919
#include <linux/types.h>
2020

2121
#define PDC_MAX_IRQS 168
22+
#define PDC_MAX_GPIO_IRQS 256
2223

2324
#define CLEAR_INTR(reg, intr) (reg & ~(1 << intr))
2425
#define ENABLE_INTR(reg, intr) (reg | (1 << intr))
2526

2627
#define IRQ_ENABLE_BANK 0x10
2728
#define IRQ_i_CFG 0x110
2829

30+
#define PDC_NO_PARENT_IRQ ~0UL
31+
2932
struct pdc_pin_region {
3033
u32 pin_base;
3134
u32 parent_base;
@@ -65,23 +68,35 @@ static void pdc_enable_intr(struct irq_data *d, bool on)
6568

6669
static void qcom_pdc_gic_disable(struct irq_data *d)
6770
{
71+
if (d->hwirq == GPIO_NO_WAKE_IRQ)
72+
return;
73+
6874
pdc_enable_intr(d, false);
6975
irq_chip_disable_parent(d);
7076
}
7177

7278
static void qcom_pdc_gic_enable(struct irq_data *d)
7379
{
80+
if (d->hwirq == GPIO_NO_WAKE_IRQ)
81+
return;
82+
7483
pdc_enable_intr(d, true);
7584
irq_chip_enable_parent(d);
7685
}
7786

7887
static void qcom_pdc_gic_mask(struct irq_data *d)
7988
{
89+
if (d->hwirq == GPIO_NO_WAKE_IRQ)
90+
return;
91+
8092
irq_chip_mask_parent(d);
8193
}
8294

8395
static void qcom_pdc_gic_unmask(struct irq_data *d)
8496
{
97+
if (d->hwirq == GPIO_NO_WAKE_IRQ)
98+
return;
99+
85100
irq_chip_unmask_parent(d);
86101
}
87102

@@ -124,6 +139,9 @@ static int qcom_pdc_gic_set_type(struct irq_data *d, unsigned int type)
124139
int pin_out = d->hwirq;
125140
enum pdc_irq_config_bits pdc_type;
126141

142+
if (pin_out == GPIO_NO_WAKE_IRQ)
143+
return 0;
144+
127145
switch (type) {
128146
case IRQ_TYPE_EDGE_RISING:
129147
pdc_type = PDC_EDGE_RISING;
@@ -181,8 +199,7 @@ static irq_hw_number_t get_parent_hwirq(int pin)
181199
return (region->parent_base + pin - region->pin_base);
182200
}
183201

184-
WARN_ON(1);
185-
return ~0UL;
202+
return PDC_NO_PARENT_IRQ;
186203
}
187204

188205
static int qcom_pdc_translate(struct irq_domain *d, struct irq_fwspec *fwspec,
@@ -211,17 +228,17 @@ static int qcom_pdc_alloc(struct irq_domain *domain, unsigned int virq,
211228

212229
ret = qcom_pdc_translate(domain, fwspec, &hwirq, &type);
213230
if (ret)
214-
return -EINVAL;
215-
216-
parent_hwirq = get_parent_hwirq(hwirq);
217-
if (parent_hwirq == ~0UL)
218-
return -EINVAL;
231+
return ret;
219232

220233
ret = irq_domain_set_hwirq_and_chip(domain, virq, hwirq,
221234
&qcom_pdc_gic_chip, NULL);
222235
if (ret)
223236
return ret;
224237

238+
parent_hwirq = get_parent_hwirq(hwirq);
239+
if (parent_hwirq == PDC_NO_PARENT_IRQ)
240+
return 0;
241+
225242
if (type & IRQ_TYPE_EDGE_BOTH)
226243
type = IRQ_TYPE_EDGE_RISING;
227244

@@ -244,6 +261,60 @@ static const struct irq_domain_ops qcom_pdc_ops = {
244261
.free = irq_domain_free_irqs_common,
245262
};
246263

264+
static int qcom_pdc_gpio_alloc(struct irq_domain *domain, unsigned int virq,
265+
unsigned int nr_irqs, void *data)
266+
{
267+
struct irq_fwspec *fwspec = data;
268+
struct irq_fwspec parent_fwspec;
269+
irq_hw_number_t hwirq, parent_hwirq;
270+
unsigned int type;
271+
int ret;
272+
273+
ret = qcom_pdc_translate(domain, fwspec, &hwirq, &type);
274+
if (ret)
275+
return ret;
276+
277+
ret = irq_domain_set_hwirq_and_chip(domain, virq, hwirq,
278+
&qcom_pdc_gic_chip, NULL);
279+
if (ret)
280+
return ret;
281+
282+
if (hwirq == GPIO_NO_WAKE_IRQ)
283+
return 0;
284+
285+
parent_hwirq = get_parent_hwirq(hwirq);
286+
if (parent_hwirq == PDC_NO_PARENT_IRQ)
287+
return 0;
288+
289+
if (type & IRQ_TYPE_EDGE_BOTH)
290+
type = IRQ_TYPE_EDGE_RISING;
291+
292+
if (type & IRQ_TYPE_LEVEL_MASK)
293+
type = IRQ_TYPE_LEVEL_HIGH;
294+
295+
parent_fwspec.fwnode = domain->parent->fwnode;
296+
parent_fwspec.param_count = 3;
297+
parent_fwspec.param[0] = 0;
298+
parent_fwspec.param[1] = parent_hwirq;
299+
parent_fwspec.param[2] = type;
300+
301+
return irq_domain_alloc_irqs_parent(domain, virq, nr_irqs,
302+
&parent_fwspec);
303+
}
304+
305+
static int qcom_pdc_gpio_domain_select(struct irq_domain *d,
306+
struct irq_fwspec *fwspec,
307+
enum irq_domain_bus_token bus_token)
308+
{
309+
return bus_token == DOMAIN_BUS_WAKEUP;
310+
}
311+
312+
static const struct irq_domain_ops qcom_pdc_gpio_ops = {
313+
.select = qcom_pdc_gpio_domain_select,
314+
.alloc = qcom_pdc_gpio_alloc,
315+
.free = irq_domain_free_irqs_common,
316+
};
317+
247318
static int pdc_setup_pin_mapping(struct device_node *np)
248319
{
249320
int ret, n;
@@ -282,7 +353,7 @@ static int pdc_setup_pin_mapping(struct device_node *np)
282353

283354
static int qcom_pdc_init(struct device_node *node, struct device_node *parent)
284355
{
285-
struct irq_domain *parent_domain, *pdc_domain;
356+
struct irq_domain *parent_domain, *pdc_domain, *pdc_gpio_domain;
286357
int ret;
287358

288359
pdc_base = of_iomap(node, 0);
@@ -313,8 +384,23 @@ static int qcom_pdc_init(struct device_node *node, struct device_node *parent)
313384
goto fail;
314385
}
315386

387+
pdc_gpio_domain = irq_domain_create_hierarchy(parent_domain,
388+
IRQ_DOMAIN_FLAG_QCOM_PDC_WAKEUP,
389+
PDC_MAX_GPIO_IRQS,
390+
of_fwnode_handle(node),
391+
&qcom_pdc_gpio_ops, NULL);
392+
if (!pdc_gpio_domain) {
393+
pr_err("%pOF: PDC domain add failed for GPIO domain\n", node);
394+
ret = -ENOMEM;
395+
goto remove;
396+
}
397+
398+
irq_domain_update_bus_token(pdc_gpio_domain, DOMAIN_BUS_WAKEUP);
399+
316400
return 0;
317401

402+
remove:
403+
irq_domain_remove(pdc_domain);
318404
fail:
319405
kfree(pdc_region);
320406
iounmap(pdc_base);

include/linux/soc/qcom/irq.h

Lines changed: 21 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,21 @@
1+
/* SPDX-License-Identifier: GPL-2.0-only */
2+
3+
#ifndef __QCOM_IRQ_H
4+
#define __QCOM_IRQ_H
5+
6+
#include <linux/irqdomain.h>
7+
8+
#define GPIO_NO_WAKE_IRQ ~0U
9+
10+
/**
11+
* QCOM specific IRQ domain flags that distinguishes the handling of wakeup
12+
* capable interrupts by different interrupt controllers.
13+
*
14+
* IRQ_DOMAIN_FLAG_QCOM_PDC_WAKEUP: Line must be masked at TLMM and the
15+
* interrupt configuration is done at PDC
16+
* IRQ_DOMAIN_FLAG_QCOM_MPM_WAKEUP: Interrupt configuration is handled at TLMM
17+
*/
18+
#define IRQ_DOMAIN_FLAG_QCOM_PDC_WAKEUP (IRQ_DOMAIN_FLAG_NONCORE << 0)
19+
#define IRQ_DOMAIN_FLAG_QCOM_MPM_WAKEUP (IRQ_DOMAIN_FLAG_NONCORE << 1)
20+
21+
#endif

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