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Merge branch 'net-phy-shrink-PHY-settings-array-and-add-200Gbps-support'
Heiner Kallweit says: ==================== net: phy: shrink PHY settings array and add 200Gbps support The definition of array settings[] is quite lengthy meanwhile. Add a macro to shrink the definition. When doing this I saw that the new 200Gbps modes and few 100Gbps/50Gbps modes aren't supported in phylib yet. So add this. To avoid ethtool and phylib mode definitions getting out of sync, add a build bug to check for this. ==================== Signed-off-by: David S. Miller <[email protected]>
2 parents 5fa7d3f + c6576bf commit 81f2eeb

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drivers/net/phy/phy-core.c

Lines changed: 68 additions & 202 deletions
Original file line numberDiff line numberDiff line change
@@ -8,6 +8,11 @@
88

99
const char *phy_speed_to_str(int speed)
1010
{
11+
BUILD_BUG_ON_MSG(__ETHTOOL_LINK_MODE_MASK_NBITS != 67,
12+
"Enum ethtool_link_mode_bit_indices and phylib are out of sync. "
13+
"If a speed or mode has been added please update phy_speed_to_str "
14+
"and the PHY settings array.\n");
15+
1116
switch (speed) {
1217
case SPEED_10:
1318
return "10Mbps";
@@ -35,6 +40,8 @@ const char *phy_speed_to_str(int speed)
3540
return "56Gbps";
3641
case SPEED_100000:
3742
return "100Gbps";
43+
case SPEED_200000:
44+
return "200Gbps";
3845
case SPEED_UNKNOWN:
3946
return "Unknown";
4047
default:
@@ -58,222 +65,81 @@ EXPORT_SYMBOL_GPL(phy_duplex_to_str);
5865
/* A mapping of all SUPPORTED settings to speed/duplex. This table
5966
* must be grouped by speed and sorted in descending match priority
6067
* - iow, descending speed. */
68+
69+
#define PHY_SETTING(s, d, b) { .speed = SPEED_ ## s, .duplex = DUPLEX_ ## d, \
70+
.bit = ETHTOOL_LINK_MODE_ ## b ## _BIT}
71+
6172
static const struct phy_setting settings[] = {
73+
/* 200G */
74+
PHY_SETTING( 200000, FULL, 200000baseCR4_Full ),
75+
PHY_SETTING( 200000, FULL, 200000baseKR4_Full ),
76+
PHY_SETTING( 200000, FULL, 200000baseLR4_ER4_FR4_Full ),
77+
PHY_SETTING( 200000, FULL, 200000baseDR4_Full ),
78+
PHY_SETTING( 200000, FULL, 200000baseSR4_Full ),
6279
/* 100G */
63-
{
64-
.speed = SPEED_100000,
65-
.duplex = DUPLEX_FULL,
66-
.bit = ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT,
67-
},
68-
{
69-
.speed = SPEED_100000,
70-
.duplex = DUPLEX_FULL,
71-
.bit = ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT,
72-
},
73-
{
74-
.speed = SPEED_100000,
75-
.duplex = DUPLEX_FULL,
76-
.bit = ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT,
77-
},
78-
{
79-
.speed = SPEED_100000,
80-
.duplex = DUPLEX_FULL,
81-
.bit = ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT,
82-
},
80+
PHY_SETTING( 100000, FULL, 100000baseCR4_Full ),
81+
PHY_SETTING( 100000, FULL, 100000baseKR4_Full ),
82+
PHY_SETTING( 100000, FULL, 100000baseLR4_ER4_Full ),
83+
PHY_SETTING( 100000, FULL, 100000baseSR4_Full ),
84+
PHY_SETTING( 100000, FULL, 100000baseCR2_Full ),
85+
PHY_SETTING( 100000, FULL, 100000baseKR2_Full ),
86+
PHY_SETTING( 100000, FULL, 100000baseLR2_ER2_FR2_Full ),
87+
PHY_SETTING( 100000, FULL, 100000baseDR2_Full ),
88+
PHY_SETTING( 100000, FULL, 100000baseSR2_Full ),
8389
/* 56G */
84-
{
85-
.speed = SPEED_56000,
86-
.duplex = DUPLEX_FULL,
87-
.bit = ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT,
88-
},
89-
{
90-
.speed = SPEED_56000,
91-
.duplex = DUPLEX_FULL,
92-
.bit = ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT,
93-
},
94-
{
95-
.speed = SPEED_56000,
96-
.duplex = DUPLEX_FULL,
97-
.bit = ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT,
98-
},
99-
{
100-
.speed = SPEED_56000,
101-
.duplex = DUPLEX_FULL,
102-
.bit = ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT,
103-
},
90+
PHY_SETTING( 56000, FULL, 56000baseCR4_Full ),
91+
PHY_SETTING( 56000, FULL, 56000baseKR4_Full ),
92+
PHY_SETTING( 56000, FULL, 56000baseLR4_Full ),
93+
PHY_SETTING( 56000, FULL, 56000baseSR4_Full ),
10494
/* 50G */
105-
{
106-
.speed = SPEED_50000,
107-
.duplex = DUPLEX_FULL,
108-
.bit = ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT,
109-
},
110-
{
111-
.speed = SPEED_50000,
112-
.duplex = DUPLEX_FULL,
113-
.bit = ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT,
114-
},
115-
{
116-
.speed = SPEED_50000,
117-
.duplex = DUPLEX_FULL,
118-
.bit = ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT,
119-
},
95+
PHY_SETTING( 50000, FULL, 50000baseCR2_Full ),
96+
PHY_SETTING( 50000, FULL, 50000baseKR2_Full ),
97+
PHY_SETTING( 50000, FULL, 50000baseSR2_Full ),
98+
PHY_SETTING( 50000, FULL, 50000baseCR_Full ),
99+
PHY_SETTING( 50000, FULL, 50000baseKR_Full ),
100+
PHY_SETTING( 50000, FULL, 50000baseLR_ER_FR_Full ),
101+
PHY_SETTING( 50000, FULL, 50000baseDR_Full ),
102+
PHY_SETTING( 50000, FULL, 50000baseSR_Full ),
120103
/* 40G */
121-
{
122-
.speed = SPEED_40000,
123-
.duplex = DUPLEX_FULL,
124-
.bit = ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT,
125-
},
126-
{
127-
.speed = SPEED_40000,
128-
.duplex = DUPLEX_FULL,
129-
.bit = ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT,
130-
},
131-
{
132-
.speed = SPEED_40000,
133-
.duplex = DUPLEX_FULL,
134-
.bit = ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT,
135-
},
136-
{
137-
.speed = SPEED_40000,
138-
.duplex = DUPLEX_FULL,
139-
.bit = ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT,
140-
},
104+
PHY_SETTING( 40000, FULL, 40000baseCR4_Full ),
105+
PHY_SETTING( 40000, FULL, 40000baseKR4_Full ),
106+
PHY_SETTING( 40000, FULL, 40000baseLR4_Full ),
107+
PHY_SETTING( 40000, FULL, 40000baseSR4_Full ),
141108
/* 25G */
142-
{
143-
.speed = SPEED_25000,
144-
.duplex = DUPLEX_FULL,
145-
.bit = ETHTOOL_LINK_MODE_25000baseCR_Full_BIT,
146-
},
147-
{
148-
.speed = SPEED_25000,
149-
.duplex = DUPLEX_FULL,
150-
.bit = ETHTOOL_LINK_MODE_25000baseKR_Full_BIT,
151-
},
152-
{
153-
.speed = SPEED_25000,
154-
.duplex = DUPLEX_FULL,
155-
.bit = ETHTOOL_LINK_MODE_25000baseSR_Full_BIT,
156-
},
157-
109+
PHY_SETTING( 25000, FULL, 25000baseCR_Full ),
110+
PHY_SETTING( 25000, FULL, 25000baseKR_Full ),
111+
PHY_SETTING( 25000, FULL, 25000baseSR_Full ),
158112
/* 20G */
159-
{
160-
.speed = SPEED_20000,
161-
.duplex = DUPLEX_FULL,
162-
.bit = ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT,
163-
},
164-
{
165-
.speed = SPEED_20000,
166-
.duplex = DUPLEX_FULL,
167-
.bit = ETHTOOL_LINK_MODE_20000baseMLD2_Full_BIT,
168-
},
113+
PHY_SETTING( 20000, FULL, 20000baseKR2_Full ),
114+
PHY_SETTING( 20000, FULL, 20000baseMLD2_Full ),
169115
/* 10G */
170-
{
171-
.speed = SPEED_10000,
172-
.duplex = DUPLEX_FULL,
173-
.bit = ETHTOOL_LINK_MODE_10000baseCR_Full_BIT,
174-
},
175-
{
176-
.speed = SPEED_10000,
177-
.duplex = DUPLEX_FULL,
178-
.bit = ETHTOOL_LINK_MODE_10000baseER_Full_BIT,
179-
},
180-
{
181-
.speed = SPEED_10000,
182-
.duplex = DUPLEX_FULL,
183-
.bit = ETHTOOL_LINK_MODE_10000baseKR_Full_BIT,
184-
},
185-
{
186-
.speed = SPEED_10000,
187-
.duplex = DUPLEX_FULL,
188-
.bit = ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT,
189-
},
190-
{
191-
.speed = SPEED_10000,
192-
.duplex = DUPLEX_FULL,
193-
.bit = ETHTOOL_LINK_MODE_10000baseLR_Full_BIT,
194-
},
195-
{
196-
.speed = SPEED_10000,
197-
.duplex = DUPLEX_FULL,
198-
.bit = ETHTOOL_LINK_MODE_10000baseLRM_Full_BIT,
199-
},
200-
{
201-
.speed = SPEED_10000,
202-
.duplex = DUPLEX_FULL,
203-
.bit = ETHTOOL_LINK_MODE_10000baseR_FEC_BIT,
204-
},
205-
{
206-
.speed = SPEED_10000,
207-
.duplex = DUPLEX_FULL,
208-
.bit = ETHTOOL_LINK_MODE_10000baseSR_Full_BIT,
209-
},
210-
{
211-
.speed = SPEED_10000,
212-
.duplex = DUPLEX_FULL,
213-
.bit = ETHTOOL_LINK_MODE_10000baseT_Full_BIT,
214-
},
116+
PHY_SETTING( 10000, FULL, 10000baseCR_Full ),
117+
PHY_SETTING( 10000, FULL, 10000baseER_Full ),
118+
PHY_SETTING( 10000, FULL, 10000baseKR_Full ),
119+
PHY_SETTING( 10000, FULL, 10000baseKX4_Full ),
120+
PHY_SETTING( 10000, FULL, 10000baseLR_Full ),
121+
PHY_SETTING( 10000, FULL, 10000baseLRM_Full ),
122+
PHY_SETTING( 10000, FULL, 10000baseR_FEC ),
123+
PHY_SETTING( 10000, FULL, 10000baseSR_Full ),
124+
PHY_SETTING( 10000, FULL, 10000baseT_Full ),
215125
/* 5G */
216-
{
217-
.speed = SPEED_5000,
218-
.duplex = DUPLEX_FULL,
219-
.bit = ETHTOOL_LINK_MODE_5000baseT_Full_BIT,
220-
},
221-
126+
PHY_SETTING( 5000, FULL, 5000baseT_Full ),
222127
/* 2.5G */
223-
{
224-
.speed = SPEED_2500,
225-
.duplex = DUPLEX_FULL,
226-
.bit = ETHTOOL_LINK_MODE_2500baseT_Full_BIT,
227-
},
228-
{
229-
.speed = SPEED_2500,
230-
.duplex = DUPLEX_FULL,
231-
.bit = ETHTOOL_LINK_MODE_2500baseX_Full_BIT,
232-
},
128+
PHY_SETTING( 2500, FULL, 2500baseT_Full ),
129+
PHY_SETTING( 2500, FULL, 2500baseX_Full ),
233130
/* 1G */
234-
{
235-
.speed = SPEED_1000,
236-
.duplex = DUPLEX_FULL,
237-
.bit = ETHTOOL_LINK_MODE_1000baseKX_Full_BIT,
238-
},
239-
{
240-
.speed = SPEED_1000,
241-
.duplex = DUPLEX_FULL,
242-
.bit = ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
243-
},
244-
{
245-
.speed = SPEED_1000,
246-
.duplex = DUPLEX_HALF,
247-
.bit = ETHTOOL_LINK_MODE_1000baseT_Half_BIT,
248-
},
249-
{
250-
.speed = SPEED_1000,
251-
.duplex = DUPLEX_FULL,
252-
.bit = ETHTOOL_LINK_MODE_1000baseX_Full_BIT,
253-
},
131+
PHY_SETTING( 1000, FULL, 1000baseKX_Full ),
132+
PHY_SETTING( 1000, FULL, 1000baseT_Full ),
133+
PHY_SETTING( 1000, HALF, 1000baseT_Half ),
134+
PHY_SETTING( 1000, FULL, 1000baseX_Full ),
254135
/* 100M */
255-
{
256-
.speed = SPEED_100,
257-
.duplex = DUPLEX_FULL,
258-
.bit = ETHTOOL_LINK_MODE_100baseT_Full_BIT,
259-
},
260-
{
261-
.speed = SPEED_100,
262-
.duplex = DUPLEX_HALF,
263-
.bit = ETHTOOL_LINK_MODE_100baseT_Half_BIT,
264-
},
136+
PHY_SETTING( 100, FULL, 100baseT_Full ),
137+
PHY_SETTING( 100, HALF, 100baseT_Half ),
265138
/* 10M */
266-
{
267-
.speed = SPEED_10,
268-
.duplex = DUPLEX_FULL,
269-
.bit = ETHTOOL_LINK_MODE_10baseT_Full_BIT,
270-
},
271-
{
272-
.speed = SPEED_10,
273-
.duplex = DUPLEX_HALF,
274-
.bit = ETHTOOL_LINK_MODE_10baseT_Half_BIT,
275-
},
139+
PHY_SETTING( 10, FULL, 10baseT_Full ),
140+
PHY_SETTING( 10, HALF, 10baseT_Half ),
276141
};
142+
#undef PHY_SETTING
277143

278144
/**
279145
* phy_lookup_setting - lookup a PHY setting

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