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| 1 | +#ifndef _ADE7758_H |
| 2 | +#define _ADE7758_H |
| 3 | + |
| 4 | +#define ADE7758_AWATTHR 0x01 |
| 5 | +#define ADE7758_BWATTHR 0x02 |
| 6 | +#define ADE7758_CWATTHR 0x03 |
| 7 | +#define ADE7758_AVARHR 0x04 |
| 8 | +#define ADE7758_BVARHR 0x05 |
| 9 | +#define ADE7758_CVARHR 0x06 |
| 10 | +#define ADE7758_AVAHR 0x07 |
| 11 | +#define ADE7758_BVAHR 0x08 |
| 12 | +#define ADE7758_CVAHR 0x09 |
| 13 | +#define ADE7758_AIRMS 0x0A |
| 14 | +#define ADE7758_BIRMS 0x0B |
| 15 | +#define ADE7758_CIRMS 0x0C |
| 16 | +#define ADE7758_AVRMS 0x0D |
| 17 | +#define ADE7758_BVRMS 0x0E |
| 18 | +#define ADE7758_CVRMS 0x0F |
| 19 | +#define ADE7758_FREQ 0x10 |
| 20 | +#define ADE7758_TEMP 0x11 |
| 21 | +#define ADE7758_WFORM 0x12 |
| 22 | +#define ADE7758_OPMODE 0x13 |
| 23 | +#define ADE7758_MMODE 0x14 |
| 24 | +#define ADE7758_WAVMODE 0x15 |
| 25 | +#define ADE7758_COMPMODE 0x16 |
| 26 | +#define ADE7758_LCYCMODE 0x17 |
| 27 | +#define ADE7758_MASK 0x18 |
| 28 | +#define ADE7758_STATUS 0x19 |
| 29 | +#define ADE7758_RSTATUS 0x1A |
| 30 | +#define ADE7758_ZXTOUT 0x1B |
| 31 | +#define ADE7758_LINECYC 0x1C |
| 32 | +#define ADE7758_SAGCYC 0x1D |
| 33 | +#define ADE7758_SAGLVL 0x1E |
| 34 | +#define ADE7758_VPINTLVL 0x1F |
| 35 | +#define ADE7758_IPINTLVL 0x20 |
| 36 | +#define ADE7758_VPEAK 0x21 |
| 37 | +#define ADE7758_IPEAK 0x22 |
| 38 | +#define ADE7758_GAIN 0x23 |
| 39 | +#define ADE7758_AVRMSGAIN 0x24 |
| 40 | +#define ADE7758_BVRMSGAIN 0x25 |
| 41 | +#define ADE7758_CVRMSGAIN 0x26 |
| 42 | +#define ADE7758_AIGAIN 0x27 |
| 43 | +#define ADE7758_BIGAIN 0x28 |
| 44 | +#define ADE7758_CIGAIN 0x29 |
| 45 | +#define ADE7758_AWG 0x2A |
| 46 | +#define ADE7758_BWG 0x2B |
| 47 | +#define ADE7758_CWG 0x2C |
| 48 | +#define ADE7758_AVARG 0x2D |
| 49 | +#define ADE7758_BVARG 0x2E |
| 50 | +#define ADE7758_CVARG 0x2F |
| 51 | +#define ADE7758_AVAG 0x30 |
| 52 | +#define ADE7758_BVAG 0x31 |
| 53 | +#define ADE7758_CVAG 0x32 |
| 54 | +#define ADE7758_AVRMSOS 0x33 |
| 55 | +#define ADE7758_BVRMSOS 0x34 |
| 56 | +#define ADE7758_CVRMSOS 0x35 |
| 57 | +#define ADE7758_AIRMSOS 0x36 |
| 58 | +#define ADE7758_BIRMSOS 0x37 |
| 59 | +#define ADE7758_CIRMSOS 0x38 |
| 60 | +#define ADE7758_AWAITOS 0x39 |
| 61 | +#define ADE7758_BWAITOS 0x3A |
| 62 | +#define ADE7758_CWAITOS 0x3B |
| 63 | +#define ADE7758_AVAROS 0x3C |
| 64 | +#define ADE7758_BVAROS 0x3D |
| 65 | +#define ADE7758_CVAROS 0x3E |
| 66 | +#define ADE7758_APHCAL 0x3F |
| 67 | +#define ADE7758_BPHCAL 0x40 |
| 68 | +#define ADE7758_CPHCAL 0x41 |
| 69 | +#define ADE7758_WDIV 0x42 |
| 70 | +#define ADE7758_VADIV 0x44 |
| 71 | +#define ADE7758_VARDIV 0x43 |
| 72 | +#define ADE7758_APCFNUM 0x45 |
| 73 | +#define ADE7758_APCFDEN 0x46 |
| 74 | +#define ADE7758_VARCFNUM 0x47 |
| 75 | +#define ADE7758_VARCFDEN 0x48 |
| 76 | +#define ADE7758_CHKSUM 0x7E |
| 77 | +#define ADE7758_VERSION 0x7F |
| 78 | + |
| 79 | +#define ADE7758_READ_REG(a) a |
| 80 | +#define ADE7758_WRITE_REG(a) ((a) | 0x80) |
| 81 | + |
| 82 | +#define ADE7758_MAX_TX 8 |
| 83 | +#define ADE7758_MAX_RX 4 |
| 84 | +#define ADE7758_STARTUP_DELAY 1 |
| 85 | + |
| 86 | +#define ADE7758_SPI_SLOW (u32)(300 * 1000) |
| 87 | +#define ADE7758_SPI_BURST (u32)(1000 * 1000) |
| 88 | +#define ADE7758_SPI_FAST (u32)(2000 * 1000) |
| 89 | + |
| 90 | +#define DRIVER_NAME "ade7758" |
| 91 | + |
| 92 | +/** |
| 93 | + * struct ade7758_state - device instance specific data |
| 94 | + * @us: actual spi_device |
| 95 | + * @work_trigger_to_ring: bh for triggered event handling |
| 96 | + * @inter: used to check if new interrupt has been triggered |
| 97 | + * @last_timestamp: passing timestamp from th to bh of interrupt handler |
| 98 | + * @indio_dev: industrial I/O device structure |
| 99 | + * @trig: data ready trigger registered with iio |
| 100 | + * @tx: transmit buffer |
| 101 | + * @rx: recieve buffer |
| 102 | + * @buf_lock: mutex to protect tx and rx |
| 103 | + **/ |
| 104 | +struct ade7758_state { |
| 105 | + struct spi_device *us; |
| 106 | + struct work_struct work_trigger_to_ring; |
| 107 | + s64 last_timestamp; |
| 108 | + struct iio_dev *indio_dev; |
| 109 | + struct iio_trigger *trig; |
| 110 | + u8 *tx; |
| 111 | + u8 *rx; |
| 112 | + struct mutex buf_lock; |
| 113 | +}; |
| 114 | +#ifdef CONFIG_IIO_RING_BUFFER |
| 115 | +/* At the moment triggers are only used for ring buffer |
| 116 | + * filling. This may change! |
| 117 | + */ |
| 118 | + |
| 119 | +enum ade7758_scan { |
| 120 | + ADE7758_SCAN_WFORM, |
| 121 | +}; |
| 122 | + |
| 123 | +void ade7758_remove_trigger(struct iio_dev *indio_dev); |
| 124 | +int ade7758_probe_trigger(struct iio_dev *indio_dev); |
| 125 | + |
| 126 | +ssize_t ade7758_read_data_from_ring(struct device *dev, |
| 127 | + struct device_attribute *attr, |
| 128 | + char *buf); |
| 129 | + |
| 130 | + |
| 131 | +int ade7758_configure_ring(struct iio_dev *indio_dev); |
| 132 | +void ade7758_unconfigure_ring(struct iio_dev *indio_dev); |
| 133 | + |
| 134 | +int ade7758_initialize_ring(struct iio_ring_buffer *ring); |
| 135 | +void ade7758_uninitialize_ring(struct iio_ring_buffer *ring); |
| 136 | +int ade7758_set_irq(struct device *dev, bool enable); |
| 137 | +#else /* CONFIG_IIO_RING_BUFFER */ |
| 138 | + |
| 139 | +static inline void ade7758_remove_trigger(struct iio_dev *indio_dev) |
| 140 | +{ |
| 141 | +} |
| 142 | +static inline int ade7758_probe_trigger(struct iio_dev *indio_dev) |
| 143 | +{ |
| 144 | + return 0; |
| 145 | +} |
| 146 | + |
| 147 | +static inline ssize_t |
| 148 | +ade7758_read_data_from_ring(struct device *dev, |
| 149 | + struct device_attribute *attr, |
| 150 | + char *buf) |
| 151 | +{ |
| 152 | + return 0; |
| 153 | +} |
| 154 | + |
| 155 | +static int ade7758_configure_ring(struct iio_dev *indio_dev) |
| 156 | +{ |
| 157 | + return 0; |
| 158 | +} |
| 159 | +static inline void ade7758_unconfigure_ring(struct iio_dev *indio_dev) |
| 160 | +{ |
| 161 | +} |
| 162 | +static inline int ade7758_initialize_ring(struct iio_ring_buffer *ring) |
| 163 | +{ |
| 164 | + return 0; |
| 165 | +} |
| 166 | +static inline void ade7758_uninitialize_ring(struct iio_ring_buffer *ring) |
| 167 | +{ |
| 168 | +} |
| 169 | +#endif /* CONFIG_IIO_RING_BUFFER */ |
| 170 | + |
| 171 | +#endif |
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