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torvaldstorvalds
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Merge tag 'gpio-v3.12-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio
Pull GPIO fixes from Linus Walleij: "Two patches for the OMAP driver, dealing with setting up IRQs properly on the device tree boot path" * tag 'gpio-v3.12-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: gpio/omap: auto-setup a GPIO when used as an IRQ gpio/omap: maintain GPIO and IRQ usage separately
2 parents 4ed5476 + fac7fa1 commit 85f6d2d

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‎drivers/gpio/gpio-omap.c

Lines changed: 101 additions & 57 deletions
Original file line numberDiff line numberDiff line change
@@ -63,6 +63,7 @@ struct gpio_bank {
6363
struct gpio_chip chip;
6464
struct clk *dbck;
6565
u32 mod_usage;
66+
u32 irq_usage;
6667
u32 dbck_enable_mask;
6768
bool dbck_enabled;
6869
struct device *dev;
@@ -86,6 +87,9 @@ struct gpio_bank {
8687
#define GPIO_BIT(bank, gpio) (1 << GPIO_INDEX(bank, gpio))
8788
#define GPIO_MOD_CTRL_BIT BIT(0)
8889

90+
#define BANK_USED(bank) (bank->mod_usage || bank->irq_usage)
91+
#define LINE_USED(line, offset) (line & (1 << offset))
92+
8993
static int irq_to_gpio(struct gpio_bank *bank, unsigned int gpio_irq)
9094
{
9195
return bank->chip.base + gpio_irq;
@@ -420,15 +424,69 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio,
420424
return 0;
421425
}
422426

427+
static void _enable_gpio_module(struct gpio_bank *bank, unsigned offset)
428+
{
429+
if (bank->regs->pinctrl) {
430+
void __iomem *reg = bank->base + bank->regs->pinctrl;
431+
432+
/* Claim the pin for MPU */
433+
__raw_writel(__raw_readl(reg) | (1 << offset), reg);
434+
}
435+
436+
if (bank->regs->ctrl && !BANK_USED(bank)) {
437+
void __iomem *reg = bank->base + bank->regs->ctrl;
438+
u32 ctrl;
439+
440+
ctrl = __raw_readl(reg);
441+
/* Module is enabled, clocks are not gated */
442+
ctrl &= ~GPIO_MOD_CTRL_BIT;
443+
__raw_writel(ctrl, reg);
444+
bank->context.ctrl = ctrl;
445+
}
446+
}
447+
448+
static void _disable_gpio_module(struct gpio_bank *bank, unsigned offset)
449+
{
450+
void __iomem *base = bank->base;
451+
452+
if (bank->regs->wkup_en &&
453+
!LINE_USED(bank->mod_usage, offset) &&
454+
!LINE_USED(bank->irq_usage, offset)) {
455+
/* Disable wake-up during idle for dynamic tick */
456+
_gpio_rmw(base, bank->regs->wkup_en, 1 << offset, 0);
457+
bank->context.wake_en =
458+
__raw_readl(bank->base + bank->regs->wkup_en);
459+
}
460+
461+
if (bank->regs->ctrl && !BANK_USED(bank)) {
462+
void __iomem *reg = bank->base + bank->regs->ctrl;
463+
u32 ctrl;
464+
465+
ctrl = __raw_readl(reg);
466+
/* Module is disabled, clocks are gated */
467+
ctrl |= GPIO_MOD_CTRL_BIT;
468+
__raw_writel(ctrl, reg);
469+
bank->context.ctrl = ctrl;
470+
}
471+
}
472+
473+
static int gpio_is_input(struct gpio_bank *bank, int mask)
474+
{
475+
void __iomem *reg = bank->base + bank->regs->direction;
476+
477+
return __raw_readl(reg) & mask;
478+
}
479+
423480
static int gpio_irq_type(struct irq_data *d, unsigned type)
424481
{
425482
struct gpio_bank *bank = irq_data_get_irq_chip_data(d);
426483
unsigned gpio = 0;
427484
int retval;
428485
unsigned long flags;
486+
unsigned offset;
429487

430-
if (WARN_ON(!bank->mod_usage))
431-
return -EINVAL;
488+
if (!BANK_USED(bank))
489+
pm_runtime_get_sync(bank->dev);
432490

433491
#ifdef CONFIG_ARCH_OMAP1
434492
if (d->irq > IH_MPUIO_BASE)
@@ -446,7 +504,17 @@ static int gpio_irq_type(struct irq_data *d, unsigned type)
446504
return -EINVAL;
447505

448506
spin_lock_irqsave(&bank->lock, flags);
449-
retval = _set_gpio_triggering(bank, GPIO_INDEX(bank, gpio), type);
507+
offset = GPIO_INDEX(bank, gpio);
508+
retval = _set_gpio_triggering(bank, offset, type);
509+
if (!LINE_USED(bank->mod_usage, offset)) {
510+
_enable_gpio_module(bank, offset);
511+
_set_gpio_direction(bank, offset, 1);
512+
} else if (!gpio_is_input(bank, 1 << offset)) {
513+
spin_unlock_irqrestore(&bank->lock, flags);
514+
return -EINVAL;
515+
}
516+
517+
bank->irq_usage |= 1 << GPIO_INDEX(bank, gpio);
450518
spin_unlock_irqrestore(&bank->lock, flags);
451519

452520
if (type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH))
@@ -603,35 +671,19 @@ static int omap_gpio_request(struct gpio_chip *chip, unsigned offset)
603671
* If this is the first gpio_request for the bank,
604672
* enable the bank module.
605673
*/
606-
if (!bank->mod_usage)
674+
if (!BANK_USED(bank))
607675
pm_runtime_get_sync(bank->dev);
608676

609677
spin_lock_irqsave(&bank->lock, flags);
610678
/* Set trigger to none. You need to enable the desired trigger with
611-
* request_irq() or set_irq_type().
679+
* request_irq() or set_irq_type(). Only do this if the IRQ line has
680+
* not already been requested.
612681
*/
613-
_set_gpio_triggering(bank, offset, IRQ_TYPE_NONE);
614-
615-
if (bank->regs->pinctrl) {
616-
void __iomem *reg = bank->base + bank->regs->pinctrl;
617-
618-
/* Claim the pin for MPU */
619-
__raw_writel(__raw_readl(reg) | (1 << offset), reg);
620-
}
621-
622-
if (bank->regs->ctrl && !bank->mod_usage) {
623-
void __iomem *reg = bank->base + bank->regs->ctrl;
624-
u32 ctrl;
625-
626-
ctrl = __raw_readl(reg);
627-
/* Module is enabled, clocks are not gated */
628-
ctrl &= ~GPIO_MOD_CTRL_BIT;
629-
__raw_writel(ctrl, reg);
630-
bank->context.ctrl = ctrl;
682+
if (!LINE_USED(bank->irq_usage, offset)) {
683+
_set_gpio_triggering(bank, offset, IRQ_TYPE_NONE);
684+
_enable_gpio_module(bank, offset);
631685
}
632-
633686
bank->mod_usage |= 1 << offset;
634-
635687
spin_unlock_irqrestore(&bank->lock, flags);
636688

637689
return 0;
@@ -640,39 +692,19 @@ static int omap_gpio_request(struct gpio_chip *chip, unsigned offset)
640692
static void omap_gpio_free(struct gpio_chip *chip, unsigned offset)
641693
{
642694
struct gpio_bank *bank = container_of(chip, struct gpio_bank, chip);
643-
void __iomem *base = bank->base;
644695
unsigned long flags;
645696

646697
spin_lock_irqsave(&bank->lock, flags);
647-
648-
if (bank->regs->wkup_en) {
649-
/* Disable wake-up during idle for dynamic tick */
650-
_gpio_rmw(base, bank->regs->wkup_en, 1 << offset, 0);
651-
bank->context.wake_en =
652-
__raw_readl(bank->base + bank->regs->wkup_en);
653-
}
654-
655698
bank->mod_usage &= ~(1 << offset);
656-
657-
if (bank->regs->ctrl && !bank->mod_usage) {
658-
void __iomem *reg = bank->base + bank->regs->ctrl;
659-
u32 ctrl;
660-
661-
ctrl = __raw_readl(reg);
662-
/* Module is disabled, clocks are gated */
663-
ctrl |= GPIO_MOD_CTRL_BIT;
664-
__raw_writel(ctrl, reg);
665-
bank->context.ctrl = ctrl;
666-
}
667-
699+
_disable_gpio_module(bank, offset);
668700
_reset_gpio(bank, bank->chip.base + offset);
669701
spin_unlock_irqrestore(&bank->lock, flags);
670702

671703
/*
672704
* If this is the last gpio to be freed in the bank,
673705
* disable the bank module.
674706
*/
675-
if (!bank->mod_usage)
707+
if (!BANK_USED(bank))
676708
pm_runtime_put(bank->dev);
677709
}
678710

@@ -762,10 +794,20 @@ static void gpio_irq_shutdown(struct irq_data *d)
762794
struct gpio_bank *bank = irq_data_get_irq_chip_data(d);
763795
unsigned int gpio = irq_to_gpio(bank, d->hwirq);
764796
unsigned long flags;
797+
unsigned offset = GPIO_INDEX(bank, gpio);
765798

766799
spin_lock_irqsave(&bank->lock, flags);
800+
bank->irq_usage &= ~(1 << offset);
801+
_disable_gpio_module(bank, offset);
767802
_reset_gpio(bank, gpio);
768803
spin_unlock_irqrestore(&bank->lock, flags);
804+
805+
/*
806+
* If this is the last IRQ to be freed in the bank,
807+
* disable the bank module.
808+
*/
809+
if (!BANK_USED(bank))
810+
pm_runtime_put(bank->dev);
769811
}
770812

771813
static void gpio_ack_irq(struct irq_data *d)
@@ -897,13 +939,6 @@ static int gpio_input(struct gpio_chip *chip, unsigned offset)
897939
return 0;
898940
}
899941

900-
static int gpio_is_input(struct gpio_bank *bank, int mask)
901-
{
902-
void __iomem *reg = bank->base + bank->regs->direction;
903-
904-
return __raw_readl(reg) & mask;
905-
}
906-
907942
static int gpio_get(struct gpio_chip *chip, unsigned offset)
908943
{
909944
struct gpio_bank *bank;
@@ -922,13 +957,22 @@ static int gpio_output(struct gpio_chip *chip, unsigned offset, int value)
922957
{
923958
struct gpio_bank *bank;
924959
unsigned long flags;
960+
int retval = 0;
925961

926962
bank = container_of(chip, struct gpio_bank, chip);
927963
spin_lock_irqsave(&bank->lock, flags);
964+
965+
if (LINE_USED(bank->irq_usage, offset)) {
966+
retval = -EINVAL;
967+
goto exit;
968+
}
969+
928970
bank->set_dataout(bank, offset, value);
929971
_set_gpio_direction(bank, offset, 0);
972+
973+
exit:
930974
spin_unlock_irqrestore(&bank->lock, flags);
931-
return 0;
975+
return retval;
932976
}
933977

934978
static int gpio_debounce(struct gpio_chip *chip, unsigned offset,
@@ -1400,7 +1444,7 @@ void omap2_gpio_prepare_for_idle(int pwr_mode)
14001444
struct gpio_bank *bank;
14011445

14021446
list_for_each_entry(bank, &omap_gpio_list, node) {
1403-
if (!bank->mod_usage || !bank->loses_context)
1447+
if (!BANK_USED(bank) || !bank->loses_context)
14041448
continue;
14051449

14061450
bank->power_mode = pwr_mode;
@@ -1414,7 +1458,7 @@ void omap2_gpio_resume_after_idle(void)
14141458
struct gpio_bank *bank;
14151459

14161460
list_for_each_entry(bank, &omap_gpio_list, node) {
1417-
if (!bank->mod_usage || !bank->loses_context)
1461+
if (!BANK_USED(bank) || !bank->loses_context)
14181462
continue;
14191463

14201464
pm_runtime_get_sync(bank->dev);

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