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Laurence Evansdavem330
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sfc: support Medford2 frequency adjustment format
Support increased precision frequency adjustment format (FP44) used by Medford2 adapters. Signed-off-by: Laurence Evans <[email protected]> Signed-off-by: Edward Cree <[email protected]> Signed-off-by: David S. Miller <[email protected]>
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  • drivers/net/ethernet/sfc

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drivers/net/ethernet/sfc/ptp.c

Lines changed: 31 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -149,18 +149,14 @@ enum ptp_packet_state {
149149
/* Maximum parts-per-billion adjustment that is acceptable */
150150
#define MAX_PPB 1000000
151151

152-
/* Number of bits required to hold the above */
153-
#define MAX_PPB_BITS 20
154-
155-
/* Number of extra bits allowed when calculating fractional ns.
156-
* EXTRA_BITS + MC_CMD_PTP_IN_ADJUST_BITS + MAX_PPB_BITS should
157-
* be less than 63.
158-
*/
159-
#define PPB_EXTRA_BITS 2
160-
161152
/* Precalculate scale word to avoid long long division at runtime */
162-
#define PPB_SCALE_WORD ((1LL << (PPB_EXTRA_BITS + MC_CMD_PTP_IN_ADJUST_BITS +\
163-
MAX_PPB_BITS)) / 1000000000LL)
153+
/* This is equivalent to 2^66 / 10^9. */
154+
#define PPB_SCALE_WORD ((1LL << (57)) / 1953125LL)
155+
156+
/* How much to shift down after scaling to convert to FP40 */
157+
#define PPB_SHIFT_FP40 26
158+
/* ... and FP44. */
159+
#define PPB_SHIFT_FP44 22
164160

165161
#define PTP_SYNC_ATTEMPTS 4
166162

@@ -261,6 +257,8 @@ struct efx_ptp_timeset {
261257
* @evt_code: Last event code
262258
* @start: Address at which MC indicates ready for synchronisation
263259
* @host_time_pps: Host time at last PPS
260+
* @adjfreq_ppb_shift: Shift required to convert scaled parts-per-billion
261+
* frequency adjustment into a fixed point fractional nanosecond format.
264262
* @current_adjfreq: Current ppb adjustment.
265263
* @phc_clock: Pointer to registered phc device (if primary function)
266264
* @phc_clock_info: Registration structure for phc device
@@ -310,6 +308,7 @@ struct efx_ptp_data {
310308
unsigned int sync_event_minor_shift;
311309
} nic_time;
312310
unsigned int min_synchronisation_ns;
311+
unsigned int capabilities;
313312
struct {
314313
s32 ptp_tx;
315314
s32 ptp_rx;
@@ -323,6 +322,7 @@ struct efx_ptp_data {
323322
int evt_code;
324323
struct efx_buffer start;
325324
struct pps_event_time host_time_pps;
325+
unsigned int adjfreq_ppb_shift;
326326
s64 current_adjfreq;
327327
struct ptp_clock *phc_clock;
328328
struct ptp_clock_info phc_clock_info;
@@ -676,6 +676,22 @@ static int efx_ptp_get_attributes(struct efx_nic *efx)
676676
else
677677
ptp->min_synchronisation_ns = DEFAULT_MIN_SYNCHRONISATION_NS;
678678

679+
if (rc == 0 &&
680+
out_len >= MC_CMD_PTP_OUT_GET_ATTRIBUTES_LEN)
681+
ptp->capabilities = MCDI_DWORD(outbuf,
682+
PTP_OUT_GET_ATTRIBUTES_CAPABILITIES);
683+
else
684+
ptp->capabilities = 0;
685+
686+
/* Set up the shift for conversion between frequency
687+
* adjustments in parts-per-billion and the fixed-point
688+
* fractional ns format that the adapter uses.
689+
*/
690+
if (ptp->capabilities & (1 << MC_CMD_PTP_OUT_GET_ATTRIBUTES_FP44_FREQ_ADJ_LBN))
691+
ptp->adjfreq_ppb_shift = PPB_SHIFT_FP44;
692+
else
693+
ptp->adjfreq_ppb_shift = PPB_SHIFT_FP40;
694+
679695
return 0;
680696
}
681697

@@ -2027,9 +2043,10 @@ static int efx_phc_adjfreq(struct ptp_clock_info *ptp, s32 delta)
20272043
else if (delta < -MAX_PPB)
20282044
delta = -MAX_PPB;
20292045

2030-
/* Convert ppb to fixed point ns. */
2031-
adjustment_ns = (((s64)delta * PPB_SCALE_WORD) >>
2032-
(PPB_EXTRA_BITS + MAX_PPB_BITS));
2046+
/* Convert ppb to fixed point ns taking care to round correctly. */
2047+
adjustment_ns = ((s64)delta * PPB_SCALE_WORD +
2048+
(1 << (ptp_data->adjfreq_ppb_shift - 1))) >>
2049+
ptp_data->adjfreq_ppb_shift;
20332050

20342051
MCDI_SET_DWORD(inadj, PTP_IN_OP, MC_CMD_PTP_OP_ADJUST);
20352052
MCDI_SET_DWORD(inadj, PTP_IN_PERIPH_ID, 0);

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