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| 1 | +/* |
| 2 | + * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/ |
| 3 | + * |
| 4 | + * This program is free software; you can redistribute it and/or modify |
| 5 | + * it under the terms of the GNU General Public License version 2 as |
| 6 | + * published by the Free Software Foundation. |
| 7 | + */ |
| 8 | + |
| 9 | +#include <dt-bindings/gpio/gpio.h> |
| 10 | +#include <dt-bindings/clk/ti-dra7-atl.h> |
| 11 | +#include <dt-bindings/input/input.h> |
| 12 | + |
| 13 | +/ { |
| 14 | + chosen { |
| 15 | + stdout-path = &uart1; |
| 16 | + }; |
| 17 | + |
| 18 | + extcon_usb1: extcon_usb1 { |
| 19 | + compatible = "linux,extcon-usb-gpio"; |
| 20 | + id-gpio = <&pcf_gpio_21 1 GPIO_ACTIVE_HIGH>; |
| 21 | + }; |
| 22 | + |
| 23 | + sound0: sound0 { |
| 24 | + compatible = "simple-audio-card"; |
| 25 | + simple-audio-card,name = "DRA7xx-EVM"; |
| 26 | + simple-audio-card,widgets = |
| 27 | + "Headphone", "Headphone Jack", |
| 28 | + "Line", "Line Out", |
| 29 | + "Microphone", "Mic Jack", |
| 30 | + "Line", "Line In"; |
| 31 | + simple-audio-card,routing = |
| 32 | + "Headphone Jack", "HPLOUT", |
| 33 | + "Headphone Jack", "HPROUT", |
| 34 | + "Line Out", "LLOUT", |
| 35 | + "Line Out", "RLOUT", |
| 36 | + "MIC3L", "Mic Jack", |
| 37 | + "MIC3R", "Mic Jack", |
| 38 | + "Mic Jack", "Mic Bias", |
| 39 | + "LINE1L", "Line In", |
| 40 | + "LINE1R", "Line In"; |
| 41 | + simple-audio-card,format = "dsp_b"; |
| 42 | + simple-audio-card,bitclock-master = <&sound0_master>; |
| 43 | + simple-audio-card,frame-master = <&sound0_master>; |
| 44 | + simple-audio-card,bitclock-inversion; |
| 45 | + |
| 46 | + sound0_master: simple-audio-card,cpu { |
| 47 | + sound-dai = <&mcasp3>; |
| 48 | + system-clock-frequency = <5644800>; |
| 49 | + }; |
| 50 | + |
| 51 | + simple-audio-card,codec { |
| 52 | + sound-dai = <&tlv320aic3106>; |
| 53 | + clocks = <&atl_clkin2_ck>; |
| 54 | + }; |
| 55 | + }; |
| 56 | + |
| 57 | + leds { |
| 58 | + compatible = "gpio-leds"; |
| 59 | + led0 { |
| 60 | + label = "dra7:usr1"; |
| 61 | + gpios = <&pcf_lcd 4 GPIO_ACTIVE_LOW>; |
| 62 | + default-state = "off"; |
| 63 | + }; |
| 64 | + |
| 65 | + led1 { |
| 66 | + label = "dra7:usr2"; |
| 67 | + gpios = <&pcf_lcd 5 GPIO_ACTIVE_LOW>; |
| 68 | + default-state = "off"; |
| 69 | + }; |
| 70 | + |
| 71 | + led2 { |
| 72 | + label = "dra7:usr3"; |
| 73 | + gpios = <&pcf_lcd 6 GPIO_ACTIVE_LOW>; |
| 74 | + default-state = "off"; |
| 75 | + }; |
| 76 | + |
| 77 | + led3 { |
| 78 | + label = "dra7:usr4"; |
| 79 | + gpios = <&pcf_lcd 7 GPIO_ACTIVE_LOW>; |
| 80 | + default-state = "off"; |
| 81 | + }; |
| 82 | + }; |
| 83 | + |
| 84 | + gpio_keys { |
| 85 | + compatible = "gpio-keys"; |
| 86 | + #address-cells = <1>; |
| 87 | + #size-cells = <0>; |
| 88 | + autorepeat; |
| 89 | + |
| 90 | + USER1 { |
| 91 | + label = "btnUser1"; |
| 92 | + linux,code = <BTN_0>; |
| 93 | + gpios = <&pcf_lcd 2 GPIO_ACTIVE_LOW>; |
| 94 | + }; |
| 95 | + |
| 96 | + USER2 { |
| 97 | + label = "btnUser2"; |
| 98 | + linux,code = <BTN_1>; |
| 99 | + gpios = <&pcf_lcd 3 GPIO_ACTIVE_LOW>; |
| 100 | + }; |
| 101 | + }; |
| 102 | +}; |
| 103 | + |
| 104 | +&i2c3 { |
| 105 | + status = "okay"; |
| 106 | + clock-frequency = <400000>; |
| 107 | +}; |
| 108 | + |
| 109 | +&mcspi1 { |
| 110 | + status = "okay"; |
| 111 | +}; |
| 112 | + |
| 113 | +&mcspi2 { |
| 114 | + status = "okay"; |
| 115 | +}; |
| 116 | + |
| 117 | +&uart1 { |
| 118 | + status = "okay"; |
| 119 | + interrupts-extended = <&crossbar_mpu GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, |
| 120 | + <&dra7_pmx_core 0x3e0>; |
| 121 | +}; |
| 122 | + |
| 123 | +&uart2 { |
| 124 | + status = "okay"; |
| 125 | +}; |
| 126 | + |
| 127 | +&uart3 { |
| 128 | + status = "okay"; |
| 129 | +}; |
| 130 | + |
| 131 | +&qspi { |
| 132 | + status = "okay"; |
| 133 | + |
| 134 | + spi-max-frequency = <76800000>; |
| 135 | + m25p80@0 { |
| 136 | + compatible = "s25fl256s1"; |
| 137 | + spi-max-frequency = <76800000>; |
| 138 | + reg = <0>; |
| 139 | + spi-tx-bus-width = <1>; |
| 140 | + spi-rx-bus-width = <4>; |
| 141 | + #address-cells = <1>; |
| 142 | + #size-cells = <1>; |
| 143 | + |
| 144 | + /* MTD partition table. |
| 145 | + * The ROM checks the first four physical blocks |
| 146 | + * for a valid file to boot and the flash here is |
| 147 | + * 64KiB block size. |
| 148 | + */ |
| 149 | + partition@0 { |
| 150 | + label = "QSPI.SPL"; |
| 151 | + reg = <0x00000000 0x000010000>; |
| 152 | + }; |
| 153 | + partition@1 { |
| 154 | + label = "QSPI.SPL.backup1"; |
| 155 | + reg = <0x00010000 0x00010000>; |
| 156 | + }; |
| 157 | + partition@2 { |
| 158 | + label = "QSPI.SPL.backup2"; |
| 159 | + reg = <0x00020000 0x00010000>; |
| 160 | + }; |
| 161 | + partition@3 { |
| 162 | + label = "QSPI.SPL.backup3"; |
| 163 | + reg = <0x00030000 0x00010000>; |
| 164 | + }; |
| 165 | + partition@4 { |
| 166 | + label = "QSPI.u-boot"; |
| 167 | + reg = <0x00040000 0x00100000>; |
| 168 | + }; |
| 169 | + partition@5 { |
| 170 | + label = "QSPI.u-boot-spl-os"; |
| 171 | + reg = <0x00140000 0x00080000>; |
| 172 | + }; |
| 173 | + partition@6 { |
| 174 | + label = "QSPI.u-boot-env"; |
| 175 | + reg = <0x001c0000 0x00010000>; |
| 176 | + }; |
| 177 | + partition@7 { |
| 178 | + label = "QSPI.u-boot-env.backup1"; |
| 179 | + reg = <0x001d0000 0x0010000>; |
| 180 | + }; |
| 181 | + partition@8 { |
| 182 | + label = "QSPI.kernel"; |
| 183 | + reg = <0x001e0000 0x0800000>; |
| 184 | + }; |
| 185 | + partition@9 { |
| 186 | + label = "QSPI.file-system"; |
| 187 | + reg = <0x009e0000 0x01620000>; |
| 188 | + }; |
| 189 | + }; |
| 190 | +}; |
| 191 | + |
| 192 | +&omap_dwc3_1 { |
| 193 | + extcon = <&extcon_usb1>; |
| 194 | +}; |
| 195 | + |
| 196 | +&usb1 { |
| 197 | + dr_mode = "otg"; |
| 198 | + extcon = <&extcon_usb1>; |
| 199 | +}; |
| 200 | + |
| 201 | +&usb2 { |
| 202 | + dr_mode = "host"; |
| 203 | +}; |
| 204 | + |
| 205 | +&atl { |
| 206 | + assigned-clocks = <&abe_dpll_sys_clk_mux>, |
| 207 | + <&atl_gfclk_mux>, |
| 208 | + <&dpll_abe_ck>, |
| 209 | + <&dpll_abe_m2x2_ck>, |
| 210 | + <&atl_clkin2_ck>; |
| 211 | + assigned-clock-parents = <&sys_clkin2>, <&dpll_abe_m2_ck>; |
| 212 | + assigned-clock-rates = <0>, <0>, <180633600>, <361267200>, <5644800>; |
| 213 | + |
| 214 | + status = "okay"; |
| 215 | + |
| 216 | + atl2 { |
| 217 | + bws = <DRA7_ATL_WS_MCASP2_FSX>; |
| 218 | + aws = <DRA7_ATL_WS_MCASP3_FSX>; |
| 219 | + }; |
| 220 | +}; |
| 221 | + |
| 222 | +&mcasp3 { |
| 223 | + #sound-dai-cells = <0>; |
| 224 | + |
| 225 | + assigned-clocks = <&mcasp3_ahclkx_mux>; |
| 226 | + assigned-clock-parents = <&atl_clkin2_ck>; |
| 227 | + |
| 228 | + status = "okay"; |
| 229 | + |
| 230 | + op-mode = <0>; /* MCASP_IIS_MODE */ |
| 231 | + tdm-slots = <2>; |
| 232 | + /* 4 serializer */ |
| 233 | + serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ |
| 234 | + 1 2 0 0 |
| 235 | + >; |
| 236 | + tx-num-evt = <32>; |
| 237 | + rx-num-evt = <32>; |
| 238 | +}; |
| 239 | + |
| 240 | +&mailbox5 { |
| 241 | + status = "okay"; |
| 242 | + mbox_ipu1_ipc3x: mbox_ipu1_ipc3x { |
| 243 | + status = "okay"; |
| 244 | + }; |
| 245 | + mbox_dsp1_ipc3x: mbox_dsp1_ipc3x { |
| 246 | + status = "okay"; |
| 247 | + }; |
| 248 | +}; |
| 249 | + |
| 250 | +&mailbox6 { |
| 251 | + status = "okay"; |
| 252 | + mbox_ipu2_ipc3x: mbox_ipu2_ipc3x { |
| 253 | + status = "okay"; |
| 254 | + }; |
| 255 | + mbox_dsp2_ipc3x: mbox_dsp2_ipc3x { |
| 256 | + status = "okay"; |
| 257 | + }; |
| 258 | +}; |
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