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#define IMP_RES_OFFSET_MASK GENMASK(5, 0)
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#define IMP_RES_OFFSET_SHIFT 0x0
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+ /* QUSB2PHY_PLL_BIAS_CONTROL_2 register bits */
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+ #define BIAS_CTRL2_RES_OFFSET_MASK GENMASK(5, 0)
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+ #define BIAS_CTRL2_RES_OFFSET_SHIFT 0x0
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+
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+ /* QUSB2PHY_CHG_CONTROL_2 register bits */
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+ #define CHG_CTRL2_OFFSET_MASK GENMASK(5, 4)
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+ #define CHG_CTRL2_OFFSET_SHIFT 0x4
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+
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/* QUSB2PHY_PORT_TUNE1 register bits */
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#define HSTX_TRIM_MASK GENMASK(7, 4)
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#define HSTX_TRIM_SHIFT 0x4
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#define PREEMPH_WIDTH_HALF_BIT BIT(2)
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#define PREEMPHASIS_EN_MASK GENMASK(1, 0)
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#define PREEMPHASIS_EN_SHIFT 0x0
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+ /* QUSB2PHY_PORT_TUNE2 register bits */
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+ #define HSDISC_TRIM_MASK GENMASK(1, 0)
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+ #define HSDISC_TRIM_SHIFT 0x0
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+
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#define QUSB2PHY_PLL_ANALOG_CONTROLS_TWO 0x04
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#define QUSB2PHY_PLL_CLOCK_INVERTERS 0x18c
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#define QUSB2PHY_PLL_CMODE 0x2c
@@ -291,12 +303,18 @@ struct override_param {
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* @hstx_trim: HSTX_TRIM to be updated in TUNE1 register
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* @preemphasis: Amplitude Pre-Emphasis to be updated in TUNE1 register
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* @preemphasis_width: half/full-width Pre-Emphasis updated via TUNE1
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+ * @bias_ctrl: bias ctrl to be updated in BIAS_CONTROL_2 register
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+ * @charge_ctrl: charge ctrl to be updated in CHG_CTRL2 register
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+ * @hsdisc_trim: disconnect threshold to be updated in TUNE2 register
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*/
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struct override_params {
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struct override_param imp_res_offset ;
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struct override_param hstx_trim ;
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struct override_param preemphasis ;
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struct override_param preemphasis_width ;
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+ struct override_param bias_ctrl ;
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+ struct override_param charge_ctrl ;
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+ struct override_param hsdisc_trim ;
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};
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/**
@@ -409,6 +427,16 @@ static void qusb2_phy_override_phy_params(struct qusb2_phy *qphy)
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or -> imp_res_offset .value << IMP_RES_OFFSET_SHIFT ,
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IMP_RES_OFFSET_MASK );
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+ if (or -> bias_ctrl .override )
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+ qusb2_write_mask (qphy -> base , QUSB2PHY_PLL_BIAS_CONTROL_2 ,
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+ or -> bias_ctrl .value << BIAS_CTRL2_RES_OFFSET_SHIFT ,
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+ BIAS_CTRL2_RES_OFFSET_MASK );
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+
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+ if (or -> charge_ctrl .override )
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+ qusb2_write_mask (qphy -> base , QUSB2PHY_CHG_CTRL2 ,
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+ or -> charge_ctrl .value << CHG_CTRL2_OFFSET_SHIFT ,
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+ CHG_CTRL2_OFFSET_MASK );
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+
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if (or -> hstx_trim .override )
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qusb2_write_mask (qphy -> base , cfg -> regs [QUSB2PHY_PORT_TUNE1 ],
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or -> hstx_trim .value << HSTX_TRIM_SHIFT ,
@@ -430,6 +458,11 @@ static void qusb2_phy_override_phy_params(struct qusb2_phy *qphy)
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cfg -> regs [QUSB2PHY_PORT_TUNE1 ],
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PREEMPH_WIDTH_HALF_BIT );
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}
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+
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+ if (or -> hsdisc_trim .override )
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+ qusb2_write_mask (qphy -> base , cfg -> regs [QUSB2PHY_PORT_TUNE2 ],
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+ or -> hsdisc_trim .value << HSDISC_TRIM_SHIFT ,
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+ HSDISC_TRIM_MASK );
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}
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/*
@@ -879,6 +912,18 @@ static int qusb2_phy_probe(struct platform_device *pdev)
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or -> imp_res_offset .override = true;
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}
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+ if (!of_property_read_u32 (dev -> of_node , "qcom,bias-ctrl-value" ,
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+ & value )) {
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+ or -> bias_ctrl .value = (u8 )value ;
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+ or -> bias_ctrl .override = true;
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+ }
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+
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+ if (!of_property_read_u32 (dev -> of_node , "qcom,charge-ctrl-value" ,
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+ & value )) {
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+ or -> charge_ctrl .value = (u8 )value ;
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+ or -> charge_ctrl .override = true;
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+ }
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+
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if (!of_property_read_u32 (dev -> of_node , "qcom,hstx-trim-value" ,
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& value )) {
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or -> hstx_trim .value = (u8 )value ;
@@ -897,6 +942,12 @@ static int qusb2_phy_probe(struct platform_device *pdev)
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or -> preemphasis_width .override = true;
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}
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+ if (!of_property_read_u32 (dev -> of_node , "qcom,hsdisc-trim-value" ,
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+ & value )) {
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+ or -> hsdisc_trim .value = (u8 )value ;
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+ or -> hsdisc_trim .override = true;
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+ }
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+
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pm_runtime_set_active (dev );
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pm_runtime_enable (dev );
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/*
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