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Shannon NelsonJeff Kirsher
Shannon Nelson
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Jeff Kirsher
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ixgbe: add ipsec register access routines
Add a few routines to make access to the ipsec registers just a little easier, and throw in the beginnings of an initialization. Signed-off-by: Shannon Nelson <[email protected]> Tested-by: Andrew Bowers <[email protected]> Signed-off-by: Jeff Kirsher <[email protected]>
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‎drivers/net/ethernet/intel/ixgbe/Makefile

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@@ -42,3 +42,4 @@ ixgbe-$(CONFIG_IXGBE_DCB) += ixgbe_dcb.o ixgbe_dcb_82598.o \
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ixgbe-$(CONFIG_IXGBE_HWMON) += ixgbe_sysfs.o
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ixgbe-$(CONFIG_DEBUG_FS) += ixgbe_debugfs.o
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ixgbe-$(CONFIG_FCOE:m=y) += ixgbe_fcoe.o
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ixgbe-$(CONFIG_XFRM_OFFLOAD) += ixgbe_ipsec.o

‎drivers/net/ethernet/intel/ixgbe/ixgbe.h

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@@ -52,6 +52,7 @@
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#ifdef CONFIG_IXGBE_DCA
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#include <linux/dca.h>
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#endif
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#include "ixgbe_ipsec.h"
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#include <net/xdp.h>
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#include <net/busy_poll.h>
@@ -1011,4 +1012,9 @@ void ixgbe_store_key(struct ixgbe_adapter *adapter);
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void ixgbe_store_reta(struct ixgbe_adapter *adapter);
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s32 ixgbe_negotiate_fc(struct ixgbe_hw *hw, u32 adv_reg, u32 lp_reg,
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u32 adv_sym, u32 adv_asm, u32 lp_sym, u32 lp_asm);
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#ifdef CONFIG_XFRM_OFFLOAD
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void ixgbe_init_ipsec_offload(struct ixgbe_adapter *adapter);
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#else
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static inline void ixgbe_init_ipsec_offload(struct ixgbe_adapter *adapter) { };
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#endif /* CONFIG_XFRM_OFFLOAD */
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#endif /* _IXGBE_H_ */

‎drivers/net/ethernet/intel/ixgbe/ixgbe_ipsec.c

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@@ -0,0 +1,161 @@
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/*******************************************************************************
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*
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* Intel 10 Gigabit PCI Express Linux driver
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* Copyright(c) 2017 Oracle and/or its affiliates. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*
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* The full GNU General Public License is included in this distribution in
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* the file called "COPYING".
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*
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* Contact Information:
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* Linux NICS <[email protected]>
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* e1000-devel Mailing List <[email protected]>
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* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
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*
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******************************************************************************/
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#include "ixgbe.h"
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/**
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* ixgbe_ipsec_set_tx_sa - set the Tx SA registers
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* @hw: hw specific details
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* @idx: register index to write
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* @key: key byte array
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* @salt: salt bytes
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**/
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static void ixgbe_ipsec_set_tx_sa(struct ixgbe_hw *hw, u16 idx,
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u32 key[], u32 salt)
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{
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u32 reg;
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int i;
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for (i = 0; i < 4; i++)
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IXGBE_WRITE_REG(hw, IXGBE_IPSTXKEY(i), cpu_to_be32(key[3 - i]));
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IXGBE_WRITE_REG(hw, IXGBE_IPSTXSALT, cpu_to_be32(salt));
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IXGBE_WRITE_FLUSH(hw);
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reg = IXGBE_READ_REG(hw, IXGBE_IPSTXIDX);
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reg &= IXGBE_RXTXIDX_IPS_EN;
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reg |= idx << IXGBE_RXTXIDX_IDX_SHIFT | IXGBE_RXTXIDX_WRITE;
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IXGBE_WRITE_REG(hw, IXGBE_IPSTXIDX, reg);
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IXGBE_WRITE_FLUSH(hw);
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}
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/**
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* ixgbe_ipsec_set_rx_item - set an Rx table item
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* @hw: hw specific details
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* @idx: register index to write
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* @tbl: table selector
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*
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* Trigger the device to store into a particular Rx table the
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* data that has already been loaded into the input register
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**/
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static void ixgbe_ipsec_set_rx_item(struct ixgbe_hw *hw, u16 idx,
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enum ixgbe_ipsec_tbl_sel tbl)
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{
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u32 reg;
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reg = IXGBE_READ_REG(hw, IXGBE_IPSRXIDX);
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reg &= IXGBE_RXTXIDX_IPS_EN;
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reg |= tbl << IXGBE_RXIDX_TBL_SHIFT |
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idx << IXGBE_RXTXIDX_IDX_SHIFT |
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IXGBE_RXTXIDX_WRITE;
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IXGBE_WRITE_REG(hw, IXGBE_IPSRXIDX, reg);
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IXGBE_WRITE_FLUSH(hw);
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}
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/**
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* ixgbe_ipsec_set_rx_sa - set up the register bits to save SA info
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* @hw: hw specific details
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* @idx: register index to write
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* @spi: security parameter index
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* @key: key byte array
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* @salt: salt bytes
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* @mode: rx decrypt control bits
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* @ip_idx: index into IP table for related IP address
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**/
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static void ixgbe_ipsec_set_rx_sa(struct ixgbe_hw *hw, u16 idx, __be32 spi,
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u32 key[], u32 salt, u32 mode, u32 ip_idx)
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{
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int i;
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/* store the SPI (in bigendian) and IPidx */
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IXGBE_WRITE_REG(hw, IXGBE_IPSRXSPI, cpu_to_le32(spi));
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IXGBE_WRITE_REG(hw, IXGBE_IPSRXIPIDX, ip_idx);
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IXGBE_WRITE_FLUSH(hw);
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ixgbe_ipsec_set_rx_item(hw, idx, ips_rx_spi_tbl);
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/* store the key, salt, and mode */
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for (i = 0; i < 4; i++)
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IXGBE_WRITE_REG(hw, IXGBE_IPSRXKEY(i), cpu_to_be32(key[3 - i]));
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IXGBE_WRITE_REG(hw, IXGBE_IPSRXSALT, cpu_to_be32(salt));
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IXGBE_WRITE_REG(hw, IXGBE_IPSRXMOD, mode);
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IXGBE_WRITE_FLUSH(hw);
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ixgbe_ipsec_set_rx_item(hw, idx, ips_rx_key_tbl);
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}
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/**
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* ixgbe_ipsec_set_rx_ip - set up the register bits to save SA IP addr info
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* @hw: hw specific details
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* @idx: register index to write
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* @addr: IP address byte array
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**/
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static void ixgbe_ipsec_set_rx_ip(struct ixgbe_hw *hw, u16 idx, __be32 addr[])
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{
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int i;
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/* store the ip address */
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for (i = 0; i < 4; i++)
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IXGBE_WRITE_REG(hw, IXGBE_IPSRXIPADDR(i), cpu_to_le32(addr[i]));
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IXGBE_WRITE_FLUSH(hw);
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ixgbe_ipsec_set_rx_item(hw, idx, ips_rx_ip_tbl);
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}
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/**
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* ixgbe_ipsec_clear_hw_tables - because some tables don't get cleared on reset
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* @adapter: board private structure
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**/
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static void ixgbe_ipsec_clear_hw_tables(struct ixgbe_adapter *adapter)
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{
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struct ixgbe_hw *hw = &adapter->hw;
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u32 buf[4] = {0, 0, 0, 0};
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u16 idx;
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/* disable Rx and Tx SA lookup */
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IXGBE_WRITE_REG(hw, IXGBE_IPSRXIDX, 0);
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IXGBE_WRITE_REG(hw, IXGBE_IPSTXIDX, 0);
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/* scrub the tables - split the loops for the max of the IP table */
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for (idx = 0; idx < IXGBE_IPSEC_MAX_RX_IP_COUNT; idx++) {
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ixgbe_ipsec_set_tx_sa(hw, idx, buf, 0);
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ixgbe_ipsec_set_rx_sa(hw, idx, 0, buf, 0, 0, 0);
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ixgbe_ipsec_set_rx_ip(hw, idx, (__be32 *)buf);
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}
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for (; idx < IXGBE_IPSEC_MAX_SA_COUNT; idx++) {
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ixgbe_ipsec_set_tx_sa(hw, idx, buf, 0);
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ixgbe_ipsec_set_rx_sa(hw, idx, 0, buf, 0, 0, 0);
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}
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}
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/**
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* ixgbe_init_ipsec_offload - initialize security registers for IPSec operation
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* @adapter: board private structure
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**/
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void ixgbe_init_ipsec_offload(struct ixgbe_adapter *adapter)
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{
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ixgbe_ipsec_clear_hw_tables(adapter);
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}

‎drivers/net/ethernet/intel/ixgbe/ixgbe_ipsec.h

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@@ -0,0 +1,53 @@
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/*******************************************************************************
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Intel 10 Gigabit PCI Express Linux driver
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Copyright(c) 2017 Oracle and/or its affiliates. All rights reserved.
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6+
This program is free software; you can redistribute it and/or modify it
7+
under the terms and conditions of the GNU General Public License,
8+
version 2, as published by the Free Software Foundation.
9+
10+
This program is distributed in the hope it will be useful, but WITHOUT
11+
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12+
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13+
more details.
14+
15+
You should have received a copy of the GNU General Public License along with
16+
this program. If not, see <http://www.gnu.org/licenses/>.
17+
18+
The full GNU General Public License is included in this distribution in
19+
the file called "COPYING".
20+
21+
Contact Information:
22+
Linux NICS <[email protected]>
23+
e1000-devel Mailing List <[email protected]>
24+
Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25+
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*******************************************************************************/
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#ifndef _IXGBE_IPSEC_H_
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#define _IXGBE_IPSEC_H_
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#define IXGBE_IPSEC_MAX_SA_COUNT 1024
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#define IXGBE_IPSEC_MAX_RX_IP_COUNT 128
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#define IXGBE_IPSEC_BASE_RX_INDEX 0
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#define IXGBE_IPSEC_BASE_TX_INDEX IXGBE_IPSEC_MAX_SA_COUNT
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#define IXGBE_RXTXIDX_IPS_EN 0x00000001
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#define IXGBE_RXIDX_TBL_SHIFT 1
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enum ixgbe_ipsec_tbl_sel {
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ips_rx_ip_tbl = 0x01,
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ips_rx_spi_tbl = 0x02,
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ips_rx_key_tbl = 0x03,
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};
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#define IXGBE_RXTXIDX_IDX_SHIFT 3
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#define IXGBE_RXTXIDX_READ 0x40000000
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#define IXGBE_RXTXIDX_WRITE 0x80000000
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#define IXGBE_RXMOD_VALID 0x00000001
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#define IXGBE_RXMOD_PROTO_ESP 0x00000004
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#define IXGBE_RXMOD_DECRYPT 0x00000008
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#define IXGBE_RXMOD_IPV6 0x00000010
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#endif /* _IXGBE_IPSEC_H_ */

‎drivers/net/ethernet/intel/ixgbe/ixgbe_main.c

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@@ -10459,6 +10459,7 @@ static int ixgbe_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
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NETIF_F_FCOE_MTU;
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}
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#endif /* IXGBE_FCOE */
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ixgbe_init_ipsec_offload(adapter);
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if (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE)
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netdev->hw_features |= NETIF_F_LRO;

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