@@ -1143,15 +1143,11 @@ static void bxt_de_pll_enable(struct drm_i915_private *dev_priv, int vco)
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dev_priv -> cdclk_pll .vco = vco ;
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}
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- static void bxt_set_cdclk (struct drm_i915_private * dev_priv , int cdclk )
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+ static void bxt_set_cdclk (struct drm_i915_private * dev_priv ,
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+ int cdclk , int vco )
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{
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u32 val , divider ;
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- int vco , ret ;
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-
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- if (IS_GEMINILAKE (dev_priv ))
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- vco = glk_de_pll_vco (dev_priv , cdclk );
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- else
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- vco = bxt_de_pll_vco (dev_priv , cdclk );
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+ int ret ;
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DRM_DEBUG_DRIVER ("Changing CDCLK to %d kHz (VCO %d kHz)\n" ,
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cdclk , vco );
@@ -1284,7 +1280,7 @@ static void bxt_sanitize_cdclk(struct drm_i915_private *dev_priv)
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*/
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void bxt_init_cdclk (struct drm_i915_private * dev_priv )
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{
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- int cdclk ;
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+ int cdclk , vco ;
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bxt_sanitize_cdclk (dev_priv );
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@@ -1296,12 +1292,15 @@ void bxt_init_cdclk(struct drm_i915_private *dev_priv)
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* - The initial CDCLK needs to be read from VBT.
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* Need to make this change after VBT has changes for BXT.
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*/
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- if (IS_GEMINILAKE (dev_priv ))
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+ if (IS_GEMINILAKE (dev_priv )) {
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cdclk = glk_calc_cdclk (0 );
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- else
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+ vco = glk_de_pll_vco (dev_priv , cdclk );
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+ } else {
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cdclk = bxt_calc_cdclk (0 );
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+ vco = bxt_de_pll_vco (dev_priv , cdclk );
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+ }
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- bxt_set_cdclk (dev_priv , cdclk );
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+ bxt_set_cdclk (dev_priv , cdclk , vco );
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}
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/**
@@ -1313,7 +1312,7 @@ void bxt_init_cdclk(struct drm_i915_private *dev_priv)
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*/
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void bxt_uninit_cdclk (struct drm_i915_private * dev_priv )
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{
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- bxt_set_cdclk (dev_priv , dev_priv -> cdclk_pll .ref );
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+ bxt_set_cdclk (dev_priv , dev_priv -> cdclk_pll .ref , 0 );
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}
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static int bdw_adjust_min_pipe_pixel_rate (struct intel_crtc_state * crtc_state ,
@@ -1533,12 +1532,18 @@ static int bxt_modeset_calc_cdclk(struct drm_atomic_state *state)
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static void bxt_modeset_commit_cdclk (struct drm_atomic_state * old_state )
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{
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- struct drm_device * dev = old_state -> dev ;
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+ struct drm_i915_private * dev_priv = to_i915 ( old_state -> dev ) ;
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struct intel_atomic_state * old_intel_state =
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to_intel_atomic_state (old_state );
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unsigned int req_cdclk = old_intel_state -> dev_cdclk ;
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+ unsigned int req_vco ;
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+
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+ if (IS_GEMINILAKE (dev_priv ))
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+ req_vco = glk_de_pll_vco (dev_priv , req_cdclk );
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+ else
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+ req_vco = bxt_de_pll_vco (dev_priv , req_cdclk );
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- bxt_set_cdclk (to_i915 ( dev ) , req_cdclk );
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+ bxt_set_cdclk (dev_priv , req_cdclk , req_vco );
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}
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static int intel_compute_max_dotclk (struct drm_i915_private * dev_priv )
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