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torvaldstorvalds
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Merge tag 'char-misc-6.6-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc
Pull misc driver fix from Greg KH: "Here is a single, much requested, fix for a set of misc drivers to resolve a much reported regression in the -rc series that has also propagated back to the stable releases. Sorry for the delay, lots of conference travel for a few weeks put me very far behind in patch wrangling. It has been reported by many to resolve the reported problem, and has been in linux-next with no reported issues" * tag 'char-misc-6.6-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: misc: rtsx: Fix some platforms can not boot and move the l1ss judgment to probe
2 parents 3abd15e + 0e4cac5 commit 8f63336

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6 files changed

+102
-212
lines changed

6 files changed

+102
-212
lines changed

‎drivers/misc/cardreader/rts5227.c

Lines changed: 6 additions & 49 deletions
Original file line numberDiff line numberDiff line change
@@ -83,63 +83,20 @@ static void rts5227_fetch_vendor_settings(struct rtsx_pcr *pcr)
8383

8484
static void rts5227_init_from_cfg(struct rtsx_pcr *pcr)
8585
{
86-
struct pci_dev *pdev = pcr->pci;
87-
int l1ss;
88-
u32 lval;
8986
struct rtsx_cr_option *option = &pcr->option;
9087

91-
l1ss = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_L1SS);
92-
if (!l1ss)
93-
return;
94-
95-
pci_read_config_dword(pdev, l1ss + PCI_L1SS_CTL1, &lval);
96-
9788
if (CHK_PCI_PID(pcr, 0x522A)) {
98-
if (0 == (lval & 0x0F))
99-
rtsx_pci_enable_oobs_polling(pcr);
100-
else
89+
if (rtsx_check_dev_flag(pcr, ASPM_L1_1_EN | ASPM_L1_2_EN
90+
| PM_L1_1_EN | PM_L1_2_EN))
10191
rtsx_pci_disable_oobs_polling(pcr);
92+
else
93+
rtsx_pci_enable_oobs_polling(pcr);
10294
}
10395

104-
if (lval & PCI_L1SS_CTL1_ASPM_L1_1)
105-
rtsx_set_dev_flag(pcr, ASPM_L1_1_EN);
106-
else
107-
rtsx_clear_dev_flag(pcr, ASPM_L1_1_EN);
108-
109-
if (lval & PCI_L1SS_CTL1_ASPM_L1_2)
110-
rtsx_set_dev_flag(pcr, ASPM_L1_2_EN);
111-
else
112-
rtsx_clear_dev_flag(pcr, ASPM_L1_2_EN);
113-
114-
if (lval & PCI_L1SS_CTL1_PCIPM_L1_1)
115-
rtsx_set_dev_flag(pcr, PM_L1_1_EN);
116-
else
117-
rtsx_clear_dev_flag(pcr, PM_L1_1_EN);
118-
119-
if (lval & PCI_L1SS_CTL1_PCIPM_L1_2)
120-
rtsx_set_dev_flag(pcr, PM_L1_2_EN);
121-
else
122-
rtsx_clear_dev_flag(pcr, PM_L1_2_EN);
123-
12496
if (option->ltr_en) {
125-
u16 val;
126-
127-
pcie_capability_read_word(pcr->pci, PCI_EXP_DEVCTL2, &val);
128-
if (val & PCI_EXP_DEVCTL2_LTR_EN) {
129-
option->ltr_enabled = true;
130-
option->ltr_active = true;
97+
if (option->ltr_enabled)
13198
rtsx_set_ltr_latency(pcr, option->ltr_active_latency);
132-
} else {
133-
option->ltr_enabled = false;
134-
}
13599
}
136-
137-
if (rtsx_check_dev_flag(pcr, ASPM_L1_1_EN | ASPM_L1_2_EN
138-
| PM_L1_1_EN | PM_L1_2_EN))
139-
option->force_clkreq_0 = false;
140-
else
141-
option->force_clkreq_0 = true;
142-
143100
}
144101

145102
static int rts5227_extra_init_hw(struct rtsx_pcr *pcr)
@@ -195,7 +152,7 @@ static int rts5227_extra_init_hw(struct rtsx_pcr *pcr)
195152
}
196153
}
197154

198-
if (option->force_clkreq_0 && pcr->aspm_mode == ASPM_MODE_CFG)
155+
if (option->force_clkreq_0)
199156
rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PETXCFG,
200157
FORCE_CLKREQ_DELINK_MASK, FORCE_CLKREQ_LOW);
201158
else

‎drivers/misc/cardreader/rts5228.c

Lines changed: 17 additions & 40 deletions
Original file line numberDiff line numberDiff line change
@@ -386,59 +386,25 @@ static void rts5228_process_ocp(struct rtsx_pcr *pcr)
386386

387387
static void rts5228_init_from_cfg(struct rtsx_pcr *pcr)
388388
{
389-
struct pci_dev *pdev = pcr->pci;
390-
int l1ss;
391-
u32 lval;
392389
struct rtsx_cr_option *option = &pcr->option;
393390

394-
l1ss = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_L1SS);
395-
if (!l1ss)
396-
return;
397-
398-
pci_read_config_dword(pdev, l1ss + PCI_L1SS_CTL1, &lval);
399-
400-
if (0 == (lval & 0x0F))
401-
rtsx_pci_enable_oobs_polling(pcr);
402-
else
391+
if (rtsx_check_dev_flag(pcr, ASPM_L1_1_EN | ASPM_L1_2_EN
392+
| PM_L1_1_EN | PM_L1_2_EN))
403393
rtsx_pci_disable_oobs_polling(pcr);
404-
405-
if (lval & PCI_L1SS_CTL1_ASPM_L1_1)
406-
rtsx_set_dev_flag(pcr, ASPM_L1_1_EN);
407-
else
408-
rtsx_clear_dev_flag(pcr, ASPM_L1_1_EN);
409-
410-
if (lval & PCI_L1SS_CTL1_ASPM_L1_2)
411-
rtsx_set_dev_flag(pcr, ASPM_L1_2_EN);
412-
else
413-
rtsx_clear_dev_flag(pcr, ASPM_L1_2_EN);
414-
415-
if (lval & PCI_L1SS_CTL1_PCIPM_L1_1)
416-
rtsx_set_dev_flag(pcr, PM_L1_1_EN);
417394
else
418-
rtsx_clear_dev_flag(pcr, PM_L1_1_EN);
419-
420-
if (lval & PCI_L1SS_CTL1_PCIPM_L1_2)
421-
rtsx_set_dev_flag(pcr, PM_L1_2_EN);
422-
else
423-
rtsx_clear_dev_flag(pcr, PM_L1_2_EN);
395+
rtsx_pci_enable_oobs_polling(pcr);
424396

425397
rtsx_pci_write_register(pcr, ASPM_FORCE_CTL, 0xFF, 0);
426-
if (option->ltr_en) {
427-
u16 val;
428398

429-
pcie_capability_read_word(pcr->pci, PCI_EXP_DEVCTL2, &val);
430-
if (val & PCI_EXP_DEVCTL2_LTR_EN) {
431-
option->ltr_enabled = true;
432-
option->ltr_active = true;
399+
if (option->ltr_en) {
400+
if (option->ltr_enabled)
433401
rtsx_set_ltr_latency(pcr, option->ltr_active_latency);
434-
} else {
435-
option->ltr_enabled = false;
436-
}
437402
}
438403
}
439404

440405
static int rts5228_extra_init_hw(struct rtsx_pcr *pcr)
441406
{
407+
struct rtsx_cr_option *option = &pcr->option;
442408

443409
rtsx_pci_write_register(pcr, RTS5228_AUTOLOAD_CFG1,
444410
CD_RESUME_EN_MASK, CD_RESUME_EN_MASK);
@@ -469,6 +435,17 @@ static int rts5228_extra_init_hw(struct rtsx_pcr *pcr)
469435
else
470436
rtsx_pci_write_register(pcr, PETXCFG, 0x30, 0x00);
471437

438+
/*
439+
* If u_force_clkreq_0 is enabled, CLKREQ# PIN will be forced
440+
* to drive low, and we forcibly request clock.
441+
*/
442+
if (option->force_clkreq_0)
443+
rtsx_pci_write_register(pcr, PETXCFG,
444+
FORCE_CLKREQ_DELINK_MASK, FORCE_CLKREQ_LOW);
445+
else
446+
rtsx_pci_write_register(pcr, PETXCFG,
447+
FORCE_CLKREQ_DELINK_MASK, FORCE_CLKREQ_HIGH);
448+
472449
rtsx_pci_write_register(pcr, PWD_SUSPEND_EN, 0xFF, 0xFB);
473450

474451
if (pcr->rtd3_en) {

‎drivers/misc/cardreader/rts5249.c

Lines changed: 7 additions & 49 deletions
Original file line numberDiff line numberDiff line change
@@ -86,64 +86,22 @@ static void rtsx_base_fetch_vendor_settings(struct rtsx_pcr *pcr)
8686

8787
static void rts5249_init_from_cfg(struct rtsx_pcr *pcr)
8888
{
89-
struct pci_dev *pdev = pcr->pci;
90-
int l1ss;
9189
struct rtsx_cr_option *option = &(pcr->option);
92-
u32 lval;
93-
94-
l1ss = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_L1SS);
95-
if (!l1ss)
96-
return;
97-
98-
pci_read_config_dword(pdev, l1ss + PCI_L1SS_CTL1, &lval);
9990

10091
if (CHK_PCI_PID(pcr, PID_524A) || CHK_PCI_PID(pcr, PID_525A)) {
101-
if (0 == (lval & 0x0F))
102-
rtsx_pci_enable_oobs_polling(pcr);
103-
else
92+
if (rtsx_check_dev_flag(pcr, ASPM_L1_1_EN | ASPM_L1_2_EN
93+
| PM_L1_1_EN | PM_L1_2_EN))
10494
rtsx_pci_disable_oobs_polling(pcr);
95+
else
96+
rtsx_pci_enable_oobs_polling(pcr);
10597
}
10698

107-
108-
if (lval & PCI_L1SS_CTL1_ASPM_L1_1)
109-
rtsx_set_dev_flag(pcr, ASPM_L1_1_EN);
110-
111-
if (lval & PCI_L1SS_CTL1_ASPM_L1_2)
112-
rtsx_set_dev_flag(pcr, ASPM_L1_2_EN);
113-
114-
if (lval & PCI_L1SS_CTL1_PCIPM_L1_1)
115-
rtsx_set_dev_flag(pcr, PM_L1_1_EN);
116-
117-
if (lval & PCI_L1SS_CTL1_PCIPM_L1_2)
118-
rtsx_set_dev_flag(pcr, PM_L1_2_EN);
119-
12099
if (option->ltr_en) {
121-
u16 val;
122-
123-
pcie_capability_read_word(pdev, PCI_EXP_DEVCTL2, &val);
124-
if (val & PCI_EXP_DEVCTL2_LTR_EN) {
125-
option->ltr_enabled = true;
126-
option->ltr_active = true;
100+
if (option->ltr_enabled)
127101
rtsx_set_ltr_latency(pcr, option->ltr_active_latency);
128-
} else {
129-
option->ltr_enabled = false;
130-
}
131102
}
132103
}
133104

134-
static int rts5249_init_from_hw(struct rtsx_pcr *pcr)
135-
{
136-
struct rtsx_cr_option *option = &(pcr->option);
137-
138-
if (rtsx_check_dev_flag(pcr, ASPM_L1_1_EN | ASPM_L1_2_EN
139-
| PM_L1_1_EN | PM_L1_2_EN))
140-
option->force_clkreq_0 = false;
141-
else
142-
option->force_clkreq_0 = true;
143-
144-
return 0;
145-
}
146-
147105
static void rts52xa_force_power_down(struct rtsx_pcr *pcr, u8 pm_state, bool runtime)
148106
{
149107
/* Set relink_time to 0 */
@@ -276,7 +234,6 @@ static int rts5249_extra_init_hw(struct rtsx_pcr *pcr)
276234
struct rtsx_cr_option *option = &(pcr->option);
277235

278236
rts5249_init_from_cfg(pcr);
279-
rts5249_init_from_hw(pcr);
280237

281238
rtsx_pci_init_cmd(pcr);
282239

@@ -327,11 +284,12 @@ static int rts5249_extra_init_hw(struct rtsx_pcr *pcr)
327284
}
328285
}
329286

287+
330288
/*
331289
* If u_force_clkreq_0 is enabled, CLKREQ# PIN will be forced
332290
* to drive low, and we forcibly request clock.
333291
*/
334-
if (option->force_clkreq_0 && pcr->aspm_mode == ASPM_MODE_CFG)
292+
if (option->force_clkreq_0)
335293
rtsx_pci_write_register(pcr, PETXCFG,
336294
FORCE_CLKREQ_DELINK_MASK, FORCE_CLKREQ_LOW);
337295
else

‎drivers/misc/cardreader/rts5260.c

Lines changed: 13 additions & 30 deletions
Original file line numberDiff line numberDiff line change
@@ -480,47 +480,19 @@ static void rts5260_pwr_saving_setting(struct rtsx_pcr *pcr)
480480

481481
static void rts5260_init_from_cfg(struct rtsx_pcr *pcr)
482482
{
483-
struct pci_dev *pdev = pcr->pci;
484-
int l1ss;
485483
struct rtsx_cr_option *option = &pcr->option;
486-
u32 lval;
487-
488-
l1ss = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_L1SS);
489-
if (!l1ss)
490-
return;
491-
492-
pci_read_config_dword(pdev, l1ss + PCI_L1SS_CTL1, &lval);
493-
494-
if (lval & PCI_L1SS_CTL1_ASPM_L1_1)
495-
rtsx_set_dev_flag(pcr, ASPM_L1_1_EN);
496-
497-
if (lval & PCI_L1SS_CTL1_ASPM_L1_2)
498-
rtsx_set_dev_flag(pcr, ASPM_L1_2_EN);
499-
500-
if (lval & PCI_L1SS_CTL1_PCIPM_L1_1)
501-
rtsx_set_dev_flag(pcr, PM_L1_1_EN);
502-
503-
if (lval & PCI_L1SS_CTL1_PCIPM_L1_2)
504-
rtsx_set_dev_flag(pcr, PM_L1_2_EN);
505484

506485
rts5260_pwr_saving_setting(pcr);
507486

508487
if (option->ltr_en) {
509-
u16 val;
510-
511-
pcie_capability_read_word(pdev, PCI_EXP_DEVCTL2, &val);
512-
if (val & PCI_EXP_DEVCTL2_LTR_EN) {
513-
option->ltr_enabled = true;
514-
option->ltr_active = true;
488+
if (option->ltr_enabled)
515489
rtsx_set_ltr_latency(pcr, option->ltr_active_latency);
516-
} else {
517-
option->ltr_enabled = false;
518-
}
519490
}
520491
}
521492

522493
static int rts5260_extra_init_hw(struct rtsx_pcr *pcr)
523494
{
495+
struct rtsx_cr_option *option = &pcr->option;
524496

525497
/* Set mcu_cnt to 7 to ensure data can be sampled properly */
526498
rtsx_pci_write_register(pcr, 0xFC03, 0x7F, 0x07);
@@ -539,6 +511,17 @@ static int rts5260_extra_init_hw(struct rtsx_pcr *pcr)
539511

540512
rts5260_init_hw(pcr);
541513

514+
/*
515+
* If u_force_clkreq_0 is enabled, CLKREQ# PIN will be forced
516+
* to drive low, and we forcibly request clock.
517+
*/
518+
if (option->force_clkreq_0)
519+
rtsx_pci_write_register(pcr, PETXCFG,
520+
FORCE_CLKREQ_DELINK_MASK, FORCE_CLKREQ_LOW);
521+
else
522+
rtsx_pci_write_register(pcr, PETXCFG,
523+
FORCE_CLKREQ_DELINK_MASK, FORCE_CLKREQ_HIGH);
524+
542525
rtsx_pci_write_register(pcr, pcr->reg_pm_ctrl3, 0x10, 0x00);
543526

544527
return 0;

‎drivers/misc/cardreader/rts5261.c

Lines changed: 13 additions & 39 deletions
Original file line numberDiff line numberDiff line change
@@ -454,54 +454,17 @@ static void rts5261_init_from_hw(struct rtsx_pcr *pcr)
454454

455455
static void rts5261_init_from_cfg(struct rtsx_pcr *pcr)
456456
{
457-
struct pci_dev *pdev = pcr->pci;
458-
int l1ss;
459-
u32 lval;
460457
struct rtsx_cr_option *option = &pcr->option;
461458

462-
l1ss = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_L1SS);
463-
if (!l1ss)
464-
return;
465-
466-
pci_read_config_dword(pdev, l1ss + PCI_L1SS_CTL1, &lval);
467-
468-
if (lval & PCI_L1SS_CTL1_ASPM_L1_1)
469-
rtsx_set_dev_flag(pcr, ASPM_L1_1_EN);
470-
else
471-
rtsx_clear_dev_flag(pcr, ASPM_L1_1_EN);
472-
473-
if (lval & PCI_L1SS_CTL1_ASPM_L1_2)
474-
rtsx_set_dev_flag(pcr, ASPM_L1_2_EN);
475-
else
476-
rtsx_clear_dev_flag(pcr, ASPM_L1_2_EN);
477-
478-
if (lval & PCI_L1SS_CTL1_PCIPM_L1_1)
479-
rtsx_set_dev_flag(pcr, PM_L1_1_EN);
480-
else
481-
rtsx_clear_dev_flag(pcr, PM_L1_1_EN);
482-
483-
if (lval & PCI_L1SS_CTL1_PCIPM_L1_2)
484-
rtsx_set_dev_flag(pcr, PM_L1_2_EN);
485-
else
486-
rtsx_clear_dev_flag(pcr, PM_L1_2_EN);
487-
488-
rtsx_pci_write_register(pcr, ASPM_FORCE_CTL, 0xFF, 0);
489459
if (option->ltr_en) {
490-
u16 val;
491-
492-
pcie_capability_read_word(pdev, PCI_EXP_DEVCTL2, &val);
493-
if (val & PCI_EXP_DEVCTL2_LTR_EN) {
494-
option->ltr_enabled = true;
495-
option->ltr_active = true;
460+
if (option->ltr_enabled)
496461
rtsx_set_ltr_latency(pcr, option->ltr_active_latency);
497-
} else {
498-
option->ltr_enabled = false;
499-
}
500462
}
501463
}
502464

503465
static int rts5261_extra_init_hw(struct rtsx_pcr *pcr)
504466
{
467+
struct rtsx_cr_option *option = &pcr->option;
505468
u32 val;
506469

507470
rtsx_pci_write_register(pcr, RTS5261_AUTOLOAD_CFG1,
@@ -547,6 +510,17 @@ static int rts5261_extra_init_hw(struct rtsx_pcr *pcr)
547510
else
548511
rtsx_pci_write_register(pcr, PETXCFG, 0x30, 0x00);
549512

513+
/*
514+
* If u_force_clkreq_0 is enabled, CLKREQ# PIN will be forced
515+
* to drive low, and we forcibly request clock.
516+
*/
517+
if (option->force_clkreq_0)
518+
rtsx_pci_write_register(pcr, PETXCFG,
519+
FORCE_CLKREQ_DELINK_MASK, FORCE_CLKREQ_LOW);
520+
else
521+
rtsx_pci_write_register(pcr, PETXCFG,
522+
FORCE_CLKREQ_DELINK_MASK, FORCE_CLKREQ_HIGH);
523+
550524
rtsx_pci_write_register(pcr, PWD_SUSPEND_EN, 0xFF, 0xFB);
551525

552526
if (pcr->rtd3_en) {

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