@@ -145,6 +145,7 @@ static int dimm_fail_cmd_code[ARRAY_SIZE(handle)];
145
145
struct nfit_test_sec {
146
146
u8 state ;
147
147
u8 passphrase [32 ];
148
+ u64 overwrite_end_time ;
148
149
} dimm_sec_info [NUM_DCR ];
149
150
150
151
static const struct nd_intel_smart smart_def = {
@@ -1069,6 +1070,50 @@ static int nd_intel_test_cmd_secure_erase(struct nfit_test *t,
1069
1070
return 0 ;
1070
1071
}
1071
1072
1073
+ static int nd_intel_test_cmd_overwrite (struct nfit_test * t ,
1074
+ struct nd_intel_overwrite * nd_cmd ,
1075
+ unsigned int buf_len , int dimm )
1076
+ {
1077
+ struct device * dev = & t -> pdev .dev ;
1078
+ struct nfit_test_sec * sec = & dimm_sec_info [dimm ];
1079
+
1080
+ if ((sec -> state & ND_INTEL_SEC_STATE_ENABLED ) &&
1081
+ memcmp (nd_cmd -> passphrase , sec -> passphrase ,
1082
+ ND_INTEL_PASSPHRASE_SIZE ) != 0 ) {
1083
+ nd_cmd -> status = ND_INTEL_STATUS_INVALID_PASS ;
1084
+ dev_dbg (dev , "overwrite: wrong passphrase\n" );
1085
+ return 0 ;
1086
+ }
1087
+
1088
+ memset (sec -> passphrase , 0 , ND_INTEL_PASSPHRASE_SIZE );
1089
+ sec -> state = ND_INTEL_SEC_STATE_OVERWRITE ;
1090
+ dev_dbg (dev , "overwrite progressing.\n" );
1091
+ sec -> overwrite_end_time = get_jiffies_64 () + 5 * HZ ;
1092
+
1093
+ return 0 ;
1094
+ }
1095
+
1096
+ static int nd_intel_test_cmd_query_overwrite (struct nfit_test * t ,
1097
+ struct nd_intel_query_overwrite * nd_cmd ,
1098
+ unsigned int buf_len , int dimm )
1099
+ {
1100
+ struct device * dev = & t -> pdev .dev ;
1101
+ struct nfit_test_sec * sec = & dimm_sec_info [dimm ];
1102
+
1103
+ if (!(sec -> state & ND_INTEL_SEC_STATE_OVERWRITE )) {
1104
+ nd_cmd -> status = ND_INTEL_STATUS_OQUERY_SEQUENCE_ERR ;
1105
+ return 0 ;
1106
+ }
1107
+
1108
+ if (time_is_before_jiffies64 (sec -> overwrite_end_time )) {
1109
+ sec -> overwrite_end_time = 0 ;
1110
+ sec -> state = 0 ;
1111
+ dev_dbg (dev , "overwrite is complete\n" );
1112
+ } else
1113
+ nd_cmd -> status = ND_INTEL_STATUS_OQUERY_INPROGRESS ;
1114
+ return 0 ;
1115
+ }
1116
+
1072
1117
static int get_dimm (struct nfit_mem * nfit_mem , unsigned int func )
1073
1118
{
1074
1119
int i ;
@@ -1140,6 +1185,14 @@ static int nfit_test_ctl(struct nvdimm_bus_descriptor *nd_desc,
1140
1185
rc = nd_intel_test_cmd_secure_erase (t ,
1141
1186
buf , buf_len , i );
1142
1187
break ;
1188
+ case NVDIMM_INTEL_OVERWRITE :
1189
+ rc = nd_intel_test_cmd_overwrite (t ,
1190
+ buf , buf_len , i - t -> dcr_idx );
1191
+ break ;
1192
+ case NVDIMM_INTEL_QUERY_OVERWRITE :
1193
+ rc = nd_intel_test_cmd_query_overwrite (t ,
1194
+ buf , buf_len , i - t -> dcr_idx );
1195
+ break ;
1143
1196
case ND_INTEL_ENABLE_LSS_STATUS :
1144
1197
rc = nd_intel_test_cmd_set_lss_status (t ,
1145
1198
buf , buf_len );
@@ -2375,6 +2428,8 @@ static void nfit_test0_setup(struct nfit_test *t)
2375
2428
set_bit (NVDIMM_INTEL_UNLOCK_UNIT , & acpi_desc -> dimm_cmd_force_en );
2376
2429
set_bit (NVDIMM_INTEL_FREEZE_LOCK , & acpi_desc -> dimm_cmd_force_en );
2377
2430
set_bit (NVDIMM_INTEL_SECURE_ERASE , & acpi_desc -> dimm_cmd_force_en );
2431
+ set_bit (NVDIMM_INTEL_OVERWRITE , & acpi_desc -> dimm_cmd_force_en );
2432
+ set_bit (NVDIMM_INTEL_QUERY_OVERWRITE , & acpi_desc -> dimm_cmd_force_en );
2378
2433
}
2379
2434
2380
2435
static void nfit_test1_setup (struct nfit_test * t )
0 commit comments