Skip to content

Commit 979bb59

Browse files
torvaldstorvalds
committed
Merge tag 'pinctrl-v6.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij: "There is nothing exciting going on, no core changes, just a few drivers and cleanups. New drivers: - Cypress CY8C95x0 chip pin control support, along with an immediate cleanup - Mediatek MT8188 SoC pin control support - Qualcomm SM8450 and SC8280XP LPASS (low power audio subsystem) pin control support - Qualcomm PM7250, PM8450 - Rockchip RV1126 SoC pin control support Improvements: - Fix some missing pins in the Armada 37xx driver - Convert Broadcom and Nomadik drivers to use PINCTRL_PINGROUP() macro - Fix some GPIO irq_chips to be immutable - Massive Qualcomm device tree binding cleanup, with more to come" * tag 'pinctrl-v6.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (119 commits) MAINTAINERS: adjust STARFIVE JH7100 PINCTRL DRIVER after file movement pinctrl: starfive: Rename "pinctrl-starfive" to "pinctrl-starfive-jh7100" pinctrl: Create subdirectory for StarFive drivers dt-bindings: pinctrl: st,stm32: Document interrupt-controller property dt-bindings: pinctrl: st,stm32: Document gpio-hog pattern property dt-bindings: pinctrl: st,stm32: Document gpio-line-names pinctrl: st: stop abusing of_get_named_gpio() pinctrl: wpcm450: Correct the fwnode_irq_get() return value check pinctrl: bcm: Remove unused struct bcm6328_pingroup pinctrl: qcom: restrict drivers per ARM/ARM64 pinctrl: bcm: ns: Remove redundant dev_err call gpio: rockchip: request GPIO mux to pinctrl when setting direction pinctrl: rockchip: add pinmux_ops.gpio_set_direction callback pinctrl: cy8c95x0: Align function names in cy8c95x0_pmxops pinctrl: cy8c95x0: Drop atomicity on operations on push_pull pinctrl: cy8c95x0: Lock register accesses in cy8c95x0_set_mux() pinctrl: sunxi: sun50i-h5: Switch to use dev_err_probe() helper pinctrl: stm32: Switch to use dev_err_probe() helper dt-bindings: qcom-pmic-gpio: Add PM7250B and PM8450 bindings pinctrl: qcom: spmi-gpio: Add compatible for PM7250B ...
2 parents 694b37a + 9d157c8 commit 979bb59

File tree

90 files changed

+9457
-1159
lines changed

Some content is hidden

Large Commits have some content hidden by default. Use the searchbox below for content that may be hidden.

90 files changed

+9457
-1159
lines changed

‎Documentation/devicetree/bindings/pinctrl/aspeed,ast2400-pinctrl.yaml

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -63,6 +63,12 @@ examples:
6363
syscon: scu@1e6e2000 {
6464
compatible = "aspeed,ast2400-scu", "syscon", "simple-mfd";
6565
reg = <0x1e6e2000 0x1a8>;
66+
#clock-cells = <1>;
67+
#reset-cells = <1>;
68+
69+
#address-cells = <1>;
70+
#size-cells = <1>;
71+
ranges = <0x0 0x1e6e2000 0x1000>;
6672
6773
pinctrl: pinctrl {
6874
compatible = "aspeed,ast2400-pinctrl";

‎Documentation/devicetree/bindings/pinctrl/aspeed,ast2500-pinctrl.yaml

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -82,6 +82,10 @@ examples:
8282
#clock-cells = <1>;
8383
#reset-cells = <1>;
8484
85+
#address-cells = <1>;
86+
#size-cells = <1>;
87+
ranges = <0x0 0x1e6e2000 0x1000>;
88+
8589
pinctrl: pinctrl {
8690
compatible = "aspeed,ast2500-pinctrl";
8791
aspeed,external-nodes = <&gfx>, <&lhc>;

‎Documentation/devicetree/bindings/pinctrl/aspeed,ast2600-pinctrl.yaml

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -96,6 +96,12 @@ examples:
9696
syscon: scu@1e6e2000 {
9797
compatible = "aspeed,ast2600-scu", "syscon", "simple-mfd";
9898
reg = <0x1e6e2000 0xf6c>;
99+
#clock-cells = <1>;
100+
#reset-cells = <1>;
101+
102+
#address-cells = <1>;
103+
#size-cells = <1>;
104+
ranges = <0x0 0x1e6e2000 0x1000>;
99105
100106
pinctrl: pinctrl {
101107
compatible = "aspeed,ast2600-pinctrl";

‎Documentation/devicetree/bindings/pinctrl/brcm,bcm4908-pinctrl.yaml

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -23,6 +23,7 @@ patternProperties:
2323
'-pins$':
2424
type: object
2525
$ref: pinmux-node.yaml#
26+
additionalProperties: false
2627

2728
properties:
2829
function:

‎Documentation/devicetree/bindings/pinctrl/cypress,cy8c95x0.yaml

Lines changed: 134 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,134 @@
1+
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+
%YAML 1.2
3+
---
4+
$id: http://devicetree.org/schemas/pinctrl/cypress,cy8c95x0.yaml#
5+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+
title: Cypress CY8C95X0 I2C GPIO expander
8+
9+
maintainers:
10+
- Patrick Rudolph <[email protected]>
11+
12+
description: |
13+
This supports the 20/40/60 pin Cypress CYC95x0 GPIO I2C expanders.
14+
Pin function configuration is performed on a per-pin basis.
15+
16+
properties:
17+
compatible:
18+
enum:
19+
- cypress,cy8c9520
20+
- cypress,cy8c9540
21+
- cypress,cy8c9560
22+
23+
reg:
24+
maxItems: 1
25+
26+
gpio-controller: true
27+
28+
'#gpio-cells':
29+
description:
30+
The first cell is the GPIO number and the second cell specifies GPIO
31+
flags, as defined in <dt-bindings/gpio/gpio.h>.
32+
const: 2
33+
34+
interrupts:
35+
maxItems: 1
36+
37+
interrupt-controller: true
38+
39+
'#interrupt-cells':
40+
const: 2
41+
42+
gpio-line-names: true
43+
44+
gpio-ranges:
45+
maxItems: 1
46+
47+
gpio-reserved-ranges:
48+
maxItems: 1
49+
50+
vdd-supply:
51+
description:
52+
Optional power supply.
53+
54+
patternProperties:
55+
'-pins$':
56+
type: object
57+
description:
58+
Pinctrl node's client devices use subnodes for desired pin configuration.
59+
Client device subnodes use below standard properties.
60+
$ref: pincfg-node.yaml#
61+
62+
properties:
63+
pins:
64+
description:
65+
List of gpio pins affected by the properties specified in this
66+
subnode.
67+
items:
68+
pattern: '^gp([0-7][0-7])$'
69+
minItems: 1
70+
maxItems: 60
71+
72+
function:
73+
description:
74+
Specify the alternative function to be configured for the specified
75+
pins.
76+
enum: [ gpio, pwm ]
77+
78+
bias-pull-down: true
79+
80+
bias-pull-up: true
81+
82+
bias-disable: true
83+
84+
output-high: true
85+
86+
output-low: true
87+
88+
drive-push-pull: true
89+
90+
drive-open-drain: true
91+
92+
drive-open-source: true
93+
94+
required:
95+
- pins
96+
- function
97+
98+
additionalProperties: false
99+
100+
required:
101+
- compatible
102+
- reg
103+
- interrupts
104+
- interrupt-controller
105+
- '#interrupt-cells'
106+
- gpio-controller
107+
- '#gpio-cells'
108+
109+
additionalProperties: false
110+
111+
allOf:
112+
- $ref: "pinctrl.yaml#"
113+
114+
examples:
115+
- |
116+
#include <dt-bindings/interrupt-controller/arm-gic.h>
117+
#include <dt-bindings/interrupt-controller/irq.h>
118+
119+
i2c {
120+
#address-cells = <1>;
121+
#size-cells = <0>;
122+
123+
pinctrl@20 {
124+
compatible = "cypress,cy8c9520";
125+
reg = <0x20>;
126+
gpio-controller;
127+
#gpio-cells = <2>;
128+
#interrupt-cells = <2>;
129+
interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
130+
interrupt-controller;
131+
vdd-supply = <&p3v3>;
132+
gpio-reserved-ranges = <5 1>;
133+
};
134+
};

‎Documentation/devicetree/bindings/pinctrl/intel,pinctrl-keembay.yaml

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -44,6 +44,7 @@ properties:
4444
patternProperties:
4545
'^gpio@[0-9a-f]*$':
4646
type: object
47+
additionalProperties: false
4748

4849
description:
4950
Child nodes can be specified to contain pin configuration information,

‎Documentation/devicetree/bindings/pinctrl/intel,pinctrl-thunderbay.yaml

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -42,6 +42,7 @@ properties:
4242
patternProperties:
4343
'^gpio@[0-9a-f]*$':
4444
type: object
45+
additionalProperties: false
4546

4647
description:
4748
Child nodes can be specified to contain pin configuration information,

‎Documentation/devicetree/bindings/pinctrl/marvell,ac5-pinctrl.yaml

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -24,6 +24,7 @@ patternProperties:
2424
'-pins$':
2525
type: object
2626
$ref: pinmux-node.yaml#
27+
additionalProperties: false
2728

2829
properties:
2930
marvell,function:

‎Documentation/devicetree/bindings/pinctrl/mediatek,mt6779-pinctrl.yaml

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -76,6 +76,8 @@ required:
7676
patternProperties:
7777
'-[0-9]*$':
7878
type: object
79+
additionalProperties: false
80+
7981
patternProperties:
8082
'-pins*$':
8183
type: object

‎Documentation/devicetree/bindings/pinctrl/mediatek,mt7986-pinctrl.yaml

Lines changed: 28 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -117,6 +117,10 @@ patternProperties:
117117
"i2s" "audio" 62, 63, 64, 65
118118
"switch_int" "eth" 66
119119
"mdc_mdio" "eth" 67
120+
"wf_2g" "wifi" 74, 75, 76, 77, 78, 79, 80, 81, 82, 83
121+
"wf_5g" "wifi" 91, 92, 93, 94, 95, 96, 97, 98, 99, 100
122+
"wf_dbdc" "wifi" 74, 75, 76, 77, 78, 79, 80, 81, 82, 83,
123+
84, 85
120124
121125
$ref: "/schemas/pinctrl/pinmux-node.yaml"
122126
properties:
@@ -234,7 +238,9 @@ patternProperties:
234238
then:
235239
properties:
236240
groups:
237-
enum: [wf_2g, wf_5g, wf_dbdc]
241+
items:
242+
enum: [wf_2g, wf_5g, wf_dbdc]
243+
maxItems: 3
238244
'.*conf.*':
239245
type: object
240246
additionalProperties: false
@@ -248,25 +254,27 @@ patternProperties:
248254
An array of strings. Each string contains the name of a pin.
249255
There is no PIN 41 to PIN 65 above on mt7686b, you can only use
250256
those pins on mt7986a.
251-
enum: [SYS_WATCHDOG, WF2G_LED, WF5G_LED, I2C_SCL, I2C_SDA, GPIO_0,
252-
GPIO_1, GPIO_2, GPIO_3, GPIO_4, GPIO_5, GPIO_6, GPIO_7,
253-
GPIO_8, GPIO_9, GPIO_10, GPIO_11, GPIO_12, GPIO_13, GPIO_14,
254-
GPIO_15, PWM0, PWM1, SPI0_CLK, SPI0_MOSI, SPI0_MISO, SPI0_CS,
255-
SPI0_HOLD, SPI0_WP, SPI1_CLK, SPI1_MOSI, SPI1_MISO, SPI1_CS,
256-
SPI2_CLK, SPI2_MOSI, SPI2_MISO, SPI2_CS, SPI2_HOLD, SPI2_WP,
257-
UART0_RXD, UART0_TXD, PCIE_PERESET_N, UART1_RXD, UART1_TXD,
258-
UART1_CTS, UART1_RTS, UART2_RXD, UART2_TXD, UART2_CTS,
259-
UART2_RTS, EMMC_DATA_0, EMMC_DATA_1, EMMC_DATA_2,
260-
EMMC_DATA_3, EMMC_DATA_4, EMMC_DATA_5, EMMC_DATA_6,
261-
EMMC_DATA_7, EMMC_CMD, EMMC_CK, EMMC_DSL, EMMC_RSTB, PCM_DTX,
262-
PCM_DRX, PCM_CLK, PCM_FS, MT7531_INT, SMI_MDC, SMI_MDIO,
263-
WF0_DIG_RESETB, WF0_CBA_RESETB, WF0_XO_REQ, WF0_TOP_CLK,
264-
WF0_TOP_DATA, WF0_HB1, WF0_HB2, WF0_HB3, WF0_HB4, WF0_HB0,
265-
WF0_HB0_B, WF0_HB5, WF0_HB6, WF0_HB7, WF0_HB8, WF0_HB9,
266-
WF0_HB10, WF1_DIG_RESETB, WF1_CBA_RESETB, WF1_XO_REQ,
267-
WF1_TOP_CLK, WF1_TOP_DATA, WF1_HB1, WF1_HB2, WF1_HB3,
268-
WF1_HB4, WF1_HB0, WF1_HB0_B, WF1_HB5, WF1_HB6, WF1_HB7,
269-
WF1_HB8]
257+
items:
258+
enum: [SYS_WATCHDOG, WF2G_LED, WF5G_LED, I2C_SCL, I2C_SDA, GPIO_0,
259+
GPIO_1, GPIO_2, GPIO_3, GPIO_4, GPIO_5, GPIO_6, GPIO_7,
260+
GPIO_8, GPIO_9, GPIO_10, GPIO_11, GPIO_12, GPIO_13, GPIO_14,
261+
GPIO_15, PWM0, PWM1, SPI0_CLK, SPI0_MOSI, SPI0_MISO, SPI0_CS,
262+
SPI0_HOLD, SPI0_WP, SPI1_CLK, SPI1_MOSI, SPI1_MISO, SPI1_CS,
263+
SPI2_CLK, SPI2_MOSI, SPI2_MISO, SPI2_CS, SPI2_HOLD, SPI2_WP,
264+
UART0_RXD, UART0_TXD, PCIE_PERESET_N, UART1_RXD, UART1_TXD,
265+
UART1_CTS, UART1_RTS, UART2_RXD, UART2_TXD, UART2_CTS,
266+
UART2_RTS, EMMC_DATA_0, EMMC_DATA_1, EMMC_DATA_2,
267+
EMMC_DATA_3, EMMC_DATA_4, EMMC_DATA_5, EMMC_DATA_6,
268+
EMMC_DATA_7, EMMC_CMD, EMMC_CK, EMMC_DSL, EMMC_RSTB, PCM_DTX,
269+
PCM_DRX, PCM_CLK, PCM_FS, MT7531_INT, SMI_MDC, SMI_MDIO,
270+
WF0_DIG_RESETB, WF0_CBA_RESETB, WF0_XO_REQ, WF0_TOP_CLK,
271+
WF0_TOP_DATA, WF0_HB1, WF0_HB2, WF0_HB3, WF0_HB4, WF0_HB0,
272+
WF0_HB0_B, WF0_HB5, WF0_HB6, WF0_HB7, WF0_HB8, WF0_HB9,
273+
WF0_HB10, WF1_DIG_RESETB, WF1_CBA_RESETB, WF1_XO_REQ,
274+
WF1_TOP_CLK, WF1_TOP_DATA, WF1_HB1, WF1_HB2, WF1_HB3,
275+
WF1_HB4, WF1_HB0, WF1_HB0_B, WF1_HB5, WF1_HB6, WF1_HB7,
276+
WF1_HB8]
277+
maxItems: 101
270278

271279
bias-disable: true
272280

0 commit comments

Comments
 (0)