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Aravind Gopalakrishnansuryasaimadhu
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EDAC, mce_amd: Don't emit 'CE' for Deferred error
Currently, when decoding an MCE, we display 'CE' for a Deferred error, like this: [Hardware Error]: CPU:0 (15:2:0) MC4_STATUS[Over|CE|MiscV|-|AddrV|Deferred|-|UECC]: 0xdc04b00095080813 When the 'UC' bit in the MCx_STATUS register is clear, the error status is either a Corrected error or Deferred error as determined by the 'Deferred' bit. So do not print 'CE' on a deferred error. Refer to AMD Error Scope Hierarchy table in a newer BKDG (example: 49125_15h_Models_30h-3Fh_BKDG.pdf, section "RAS Features"). Signed-off-by: Aravind Gopalakrishnan <[email protected]> Cc: Mauro Carvalho Chehab <[email protected]> Cc: linux-edac <[email protected]> Link: http://lkml.kernel.org/r/[email protected] Signed-off-by: Borislav Petkov <[email protected]>
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drivers/edac/mce_amd.c

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -763,7 +763,8 @@ int amd_decode_mce(struct notifier_block *nb, unsigned long val, void *data)
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c->x86, c->x86_model, c->x86_mask,
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m->bank,
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((m->status & MCI_STATUS_OVER) ? "Over" : "-"),
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((m->status & MCI_STATUS_UC) ? "UE" : "CE"),
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((m->status & MCI_STATUS_UC) ? "UE" :
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(m->status & MCI_STATUS_DEFERRED) ? "-" : "CE"),
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((m->status & MCI_STATUS_MISCV) ? "MiscV" : "-"),
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((m->status & MCI_STATUS_PCC) ? "PCC" : "-"),
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((m->status & MCI_STATUS_ADDRV) ? "AddrV" : "-"));

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