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Merge branch 'drm-next-4.17' of git://people.freedesktop.org/~agd5f/linux into drm-next
- Add a PX quirk for radeon - Fix flickering and stability issues with DC on some platforms - Fix HDMI audio regression - Few other misc DC and base driver fixes * 'drm-next-4.17' of git://people.freedesktop.org/~agd5f/linux: Revert "drm/amd/display: disable CRTCs with NULL FB on their primary plane (V2)" Revert "drm/amd/display: fix dereferencing possible ERR_PTR()" drm/amd/display: Fix regamma not affecting full-intensity color values drm/amd/display: Fix FBC text console corruption drm/amd/display: Only register backlight device if embedded panel connected drm/amd/display: fix brightness level after resume from suspend drm/amd/display: HDMI has no sound after Panel power off/on drm/amdgpu: add MP1 and THM hw ip base reg offset drm/amdgpu: fix null pointer panic with direct fw loading on gpu reset drm/radeon: add PX quirk for Asus K73TK
2 parents dece02f + 1cb19e8 commit a10beab

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10 files changed

+124
-74
lines changed

10 files changed

+124
-74
lines changed

‎drivers/gpu/drm/amd/amdgpu/amdgpu.h

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1379,6 +1379,7 @@ enum amd_hw_ip_block_type {
13791379
ATHUB_HWIP,
13801380
NBIO_HWIP,
13811381
MP0_HWIP,
1382+
MP1_HWIP,
13821383
UVD_HWIP,
13831384
VCN_HWIP = UVD_HWIP,
13841385
VCE_HWIP,
@@ -1388,6 +1389,7 @@ enum amd_hw_ip_block_type {
13881389
SMUIO_HWIP,
13891390
PWR_HWIP,
13901391
NBIF_HWIP,
1392+
THM_HWIP,
13911393
MAX_HWIP
13921394
};
13931395

‎drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -505,6 +505,9 @@ static int psp_resume(void *handle)
505505

506506
int psp_gpu_reset(struct amdgpu_device *adev)
507507
{
508+
if (adev->firmware.load_type != AMDGPU_FW_LOAD_PSP)
509+
return 0;
510+
508511
return psp_mode1_reset(&adev->psp);
509512
}
510513

‎drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -38,6 +38,7 @@ int vega10_reg_base_init(struct amdgpu_device *adev)
3838
adev->reg_offset[ATHUB_HWIP][i] = (uint32_t *)(&(ATHUB_BASE.instance[i]));
3939
adev->reg_offset[NBIO_HWIP][i] = (uint32_t *)(&(NBIO_BASE.instance[i]));
4040
adev->reg_offset[MP0_HWIP][i] = (uint32_t *)(&(MP0_BASE.instance[i]));
41+
adev->reg_offset[MP1_HWIP][i] = (uint32_t *)(&(MP1_BASE.instance[i]));
4142
adev->reg_offset[UVD_HWIP][i] = (uint32_t *)(&(UVD_BASE.instance[i]));
4243
adev->reg_offset[VCE_HWIP][i] = (uint32_t *)(&(VCE_BASE.instance[i]));
4344
adev->reg_offset[VCN_HWIP][i] = (uint32_t *)(&(VCN_BASE.instance[i]));
@@ -49,7 +50,7 @@ int vega10_reg_base_init(struct amdgpu_device *adev)
4950
adev->reg_offset[SMUIO_HWIP][i] = (uint32_t *)(&(SMUIO_BASE.instance[i]));
5051
adev->reg_offset[PWR_HWIP][i] = (uint32_t *)(&(PWR_BASE.instance[i]));
5152
adev->reg_offset[NBIF_HWIP][i] = (uint32_t *)(&(NBIF_BASE.instance[i]));
52-
53+
adev->reg_offset[THM_HWIP][i] = (uint32_t *)(&(THM_BASE.instance[i]));
5354
}
5455
return 0;
5556
}

‎drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

Lines changed: 33 additions & 56 deletions
Original file line numberDiff line numberDiff line change
@@ -1403,6 +1403,28 @@ static int initialize_plane(struct amdgpu_display_manager *dm,
14031403
return ret;
14041404
}
14051405

1406+
1407+
static void register_backlight_device(struct amdgpu_display_manager *dm,
1408+
struct dc_link *link)
1409+
{
1410+
#if defined(CONFIG_BACKLIGHT_CLASS_DEVICE) ||\
1411+
defined(CONFIG_BACKLIGHT_CLASS_DEVICE_MODULE)
1412+
1413+
if ((link->connector_signal & (SIGNAL_TYPE_EDP | SIGNAL_TYPE_LVDS)) &&
1414+
link->type != dc_connection_none) {
1415+
/* Event if registration failed, we should continue with
1416+
* DM initialization because not having a backlight control
1417+
* is better then a black screen.
1418+
*/
1419+
amdgpu_dm_register_backlight_device(dm);
1420+
1421+
if (dm->backlight_dev)
1422+
dm->backlight_link = link;
1423+
}
1424+
#endif
1425+
}
1426+
1427+
14061428
/* In this architecture, the association
14071429
* connector -> encoder -> crtc
14081430
* id not really requried. The crtc and connector will hold the
@@ -1456,6 +1478,7 @@ static int amdgpu_dm_initialize_drm_device(struct amdgpu_device *adev)
14561478

14571479
/* loops over all connectors on the board */
14581480
for (i = 0; i < link_cnt; i++) {
1481+
struct dc_link *link = NULL;
14591482

14601483
if (i > AMDGPU_DM_MAX_DISPLAY_INDEX) {
14611484
DRM_ERROR(
@@ -1482,9 +1505,14 @@ static int amdgpu_dm_initialize_drm_device(struct amdgpu_device *adev)
14821505
goto fail;
14831506
}
14841507

1485-
if (dc_link_detect(dc_get_link_at_index(dm->dc, i),
1486-
DETECT_REASON_BOOT))
1508+
link = dc_get_link_at_index(dm->dc, i);
1509+
1510+
if (dc_link_detect(link, DETECT_REASON_BOOT)) {
14871511
amdgpu_dm_update_connector_after_detect(aconnector);
1512+
register_backlight_device(dm, link);
1513+
}
1514+
1515+
14881516
}
14891517

14901518
/* Software is initialized. Now we can register interrupt handlers. */
@@ -2685,7 +2713,8 @@ static void amdgpu_dm_connector_destroy(struct drm_connector *connector)
26852713
#if defined(CONFIG_BACKLIGHT_CLASS_DEVICE) ||\
26862714
defined(CONFIG_BACKLIGHT_CLASS_DEVICE_MODULE)
26872715

2688-
if (link->connector_signal & (SIGNAL_TYPE_EDP | SIGNAL_TYPE_LVDS)) {
2716+
if ((link->connector_signal & (SIGNAL_TYPE_EDP | SIGNAL_TYPE_LVDS)) &&
2717+
link->type != dc_connection_none) {
26892718
amdgpu_dm_register_backlight_device(dm);
26902719

26912720
if (dm->backlight_dev) {
@@ -3561,6 +3590,7 @@ create_i2c(struct ddc_service *ddc_service,
35613590
return i2c;
35623591
}
35633592

3593+
35643594
/* Note: this function assumes that dc_link_detect() was called for the
35653595
* dc_link which will be represented by this aconnector.
35663596
*/
@@ -3630,28 +3660,6 @@ static int amdgpu_dm_connector_init(struct amdgpu_display_manager *dm,
36303660
|| connector_type == DRM_MODE_CONNECTOR_eDP)
36313661
amdgpu_dm_initialize_dp_connector(dm, aconnector);
36323662

3633-
#if defined(CONFIG_BACKLIGHT_CLASS_DEVICE) ||\
3634-
defined(CONFIG_BACKLIGHT_CLASS_DEVICE_MODULE)
3635-
3636-
/* NOTE: this currently will create backlight device even if a panel
3637-
* is not connected to the eDP/LVDS connector.
3638-
*
3639-
* This is less than ideal but we don't have sink information at this
3640-
* stage since detection happens after. We can't do detection earlier
3641-
* since MST detection needs connectors to be created first.
3642-
*/
3643-
if (link->connector_signal & (SIGNAL_TYPE_EDP | SIGNAL_TYPE_LVDS)) {
3644-
/* Event if registration failed, we should continue with
3645-
* DM initialization because not having a backlight control
3646-
* is better then a black screen.
3647-
*/
3648-
amdgpu_dm_register_backlight_device(dm);
3649-
3650-
if (dm->backlight_dev)
3651-
dm->backlight_link = link;
3652-
}
3653-
#endif
3654-
36553663
out_free:
36563664
if (res) {
36573665
kfree(i2c);
@@ -4840,33 +4848,6 @@ static int dm_update_planes_state(struct dc *dc,
48404848
return ret;
48414849
}
48424850

4843-
static int dm_atomic_check_plane_state_fb(struct drm_atomic_state *state,
4844-
struct drm_crtc *crtc)
4845-
{
4846-
struct drm_plane *plane;
4847-
struct drm_crtc_state *crtc_state;
4848-
4849-
WARN_ON(!drm_atomic_get_new_crtc_state(state, crtc));
4850-
4851-
drm_for_each_plane_mask(plane, state->dev, crtc->state->plane_mask) {
4852-
struct drm_plane_state *plane_state =
4853-
drm_atomic_get_plane_state(state, plane);
4854-
4855-
if (IS_ERR(plane_state))
4856-
return -EDEADLK;
4857-
4858-
crtc_state = drm_atomic_get_crtc_state(plane_state->state, crtc);
4859-
if (IS_ERR(crtc_state))
4860-
return PTR_ERR(crtc_state);
4861-
4862-
if (crtc->primary == plane && crtc_state->active) {
4863-
if (!plane_state->fb)
4864-
return -EINVAL;
4865-
}
4866-
}
4867-
return 0;
4868-
}
4869-
48704851
static int amdgpu_dm_atomic_check(struct drm_device *dev,
48714852
struct drm_atomic_state *state)
48724853
{
@@ -4890,10 +4871,6 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev,
48904871
goto fail;
48914872

48924873
for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {
4893-
ret = dm_atomic_check_plane_state_fb(state, crtc);
4894-
if (ret)
4895-
goto fail;
4896-
48974874
if (!drm_atomic_crtc_needs_modeset(new_crtc_state) &&
48984875
!new_crtc_state->color_mgmt_changed)
48994876
continue;

‎drivers/gpu/drm/amd/display/dc/core/dc_link.c

Lines changed: 13 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1997,6 +1997,19 @@ bool dc_link_set_backlight_level(const struct dc_link *link, uint32_t level,
19971997
return true;
19981998
}
19991999

2000+
bool dc_link_set_abm_disable(const struct dc_link *link)
2001+
{
2002+
struct dc *core_dc = link->ctx->dc;
2003+
struct abm *abm = core_dc->res_pool->abm;
2004+
2005+
if ((abm == NULL) || (abm->funcs->set_backlight_level == NULL))
2006+
return false;
2007+
2008+
abm->funcs->set_abm_immediate_disable(abm);
2009+
2010+
return true;
2011+
}
2012+
20002013
bool dc_link_set_psr_enable(const struct dc_link *link, bool enable, bool wait)
20012014
{
20022015
struct dc *core_dc = link->ctx->dc;

‎drivers/gpu/drm/amd/display/dc/dc_link.h

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -132,6 +132,8 @@ static inline struct dc_link *dc_get_link_at_index(struct dc *dc, uint32_t link_
132132
bool dc_link_set_backlight_level(const struct dc_link *dc_link, uint32_t level,
133133
uint32_t frame_ramp, const struct dc_stream_state *stream);
134134

135+
bool dc_link_set_abm_disable(const struct dc_link *dc_link);
136+
135137
bool dc_link_set_psr_enable(const struct dc_link *dc_link, bool enable, bool wait);
136138

137139
bool dc_link_get_psr_state(const struct dc_link *dc_link, uint32_t *psr_state);

‎drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -735,6 +735,8 @@ static void dce110_stream_encoder_update_hdmi_info_packets(
735735
if (info_frame->avi.valid) {
736736
const uint32_t *content =
737737
(const uint32_t *) &info_frame->avi.sb[0];
738+
/*we need turn on clock before programming AFMT block*/
739+
REG_UPDATE(AFMT_CNTL, AFMT_AUDIO_CLOCK_EN, 1);
738740

739741
REG_WRITE(AFMT_AVI_INFO0, content[0]);
740742

‎drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c

Lines changed: 54 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -102,6 +102,43 @@ static uint32_t align_to_chunks_number_per_line(uint32_t pixels)
102102
return 256 * ((pixels + 255) / 256);
103103
}
104104

105+
static void reset_lb_on_vblank(struct dc_context *ctx)
106+
{
107+
uint32_t value, frame_count;
108+
uint32_t retry = 0;
109+
uint32_t status_pos =
110+
dm_read_reg(ctx, mmCRTC_STATUS_POSITION);
111+
112+
113+
/* Only if CRTC is enabled and counter is moving we wait for one frame. */
114+
if (status_pos != dm_read_reg(ctx, mmCRTC_STATUS_POSITION)) {
115+
/* Resetting LB on VBlank */
116+
value = dm_read_reg(ctx, mmLB_SYNC_RESET_SEL);
117+
set_reg_field_value(value, 3, LB_SYNC_RESET_SEL, LB_SYNC_RESET_SEL);
118+
set_reg_field_value(value, 1, LB_SYNC_RESET_SEL, LB_SYNC_RESET_SEL2);
119+
dm_write_reg(ctx, mmLB_SYNC_RESET_SEL, value);
120+
121+
frame_count = dm_read_reg(ctx, mmCRTC_STATUS_FRAME_COUNT);
122+
123+
124+
for (retry = 100; retry > 0; retry--) {
125+
if (frame_count != dm_read_reg(ctx, mmCRTC_STATUS_FRAME_COUNT))
126+
break;
127+
msleep(1);
128+
}
129+
if (!retry)
130+
dm_error("Frame count did not increase for 100ms.\n");
131+
132+
/* Resetting LB on VBlank */
133+
value = dm_read_reg(ctx, mmLB_SYNC_RESET_SEL);
134+
set_reg_field_value(value, 2, LB_SYNC_RESET_SEL, LB_SYNC_RESET_SEL);
135+
set_reg_field_value(value, 0, LB_SYNC_RESET_SEL, LB_SYNC_RESET_SEL2);
136+
dm_write_reg(ctx, mmLB_SYNC_RESET_SEL, value);
137+
138+
}
139+
140+
}
141+
105142
static void wait_for_fbc_state_changed(
106143
struct dce110_compressor *cp110,
107144
bool enabled)
@@ -232,19 +269,23 @@ void dce110_compressor_disable_fbc(struct compressor *compressor)
232269
{
233270
struct dce110_compressor *cp110 = TO_DCE110_COMPRESSOR(compressor);
234271

235-
if (compressor->options.bits.FBC_SUPPORT &&
236-
dce110_compressor_is_fbc_enabled_in_hw(compressor, NULL)) {
237-
uint32_t reg_data;
238-
/* Turn off compression */
239-
reg_data = dm_read_reg(compressor->ctx, mmFBC_CNTL);
240-
set_reg_field_value(reg_data, 0, FBC_CNTL, FBC_GRPH_COMP_EN);
241-
dm_write_reg(compressor->ctx, mmFBC_CNTL, reg_data);
242-
243-
/* Reset enum controller_id to undefined */
244-
compressor->attached_inst = 0;
245-
compressor->is_enabled = false;
246-
247-
wait_for_fbc_state_changed(cp110, false);
272+
if (compressor->options.bits.FBC_SUPPORT) {
273+
if (dce110_compressor_is_fbc_enabled_in_hw(compressor, NULL)) {
274+
uint32_t reg_data;
275+
/* Turn off compression */
276+
reg_data = dm_read_reg(compressor->ctx, mmFBC_CNTL);
277+
set_reg_field_value(reg_data, 0, FBC_CNTL, FBC_GRPH_COMP_EN);
278+
dm_write_reg(compressor->ctx, mmFBC_CNTL, reg_data);
279+
280+
/* Reset enum controller_id to undefined */
281+
compressor->attached_inst = 0;
282+
compressor->is_enabled = false;
283+
284+
wait_for_fbc_state_changed(cp110, false);
285+
}
286+
287+
/* Sync line buffer - dce100/110 only*/
288+
reset_lb_on_vblank(compressor->ctx);
248289
}
249290
}
250291

‎drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

Lines changed: 9 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -453,10 +453,13 @@ dce110_translate_regamma_to_hw_format(const struct dc_transfer_func *output_tf,
453453

454454
} else {
455455
/* 10 segments
456-
* segment is from 2^-10 to 2^0
456+
* segment is from 2^-10 to 2^1
457+
* We include an extra segment for range [2^0, 2^1). This is to
458+
* ensure that colors with normalized values of 1 don't miss the
459+
* LUT.
457460
*/
458461
region_start = -10;
459-
region_end = 0;
462+
region_end = 1;
460463

461464
seg_distr[0] = 4;
462465
seg_distr[1] = 4;
@@ -468,7 +471,7 @@ dce110_translate_regamma_to_hw_format(const struct dc_transfer_func *output_tf,
468471
seg_distr[7] = 4;
469472
seg_distr[8] = 4;
470473
seg_distr[9] = 4;
471-
seg_distr[10] = -1;
474+
seg_distr[10] = 0;
472475
seg_distr[11] = -1;
473476
seg_distr[12] = -1;
474477
seg_distr[13] = -1;
@@ -1016,8 +1019,10 @@ void dce110_blank_stream(struct pipe_ctx *pipe_ctx)
10161019
struct dc_stream_state *stream = pipe_ctx->stream;
10171020
struct dc_link *link = stream->sink->link;
10181021

1019-
if (link->local_sink && link->local_sink->sink_signal == SIGNAL_TYPE_EDP)
1022+
if (link->local_sink && link->local_sink->sink_signal == SIGNAL_TYPE_EDP) {
10201023
link->dc->hwss.edp_backlight_control(link, false);
1024+
dc_link_set_abm_disable(link);
1025+
}
10211026

10221027
if (dc_is_dp_signal(pipe_ctx->stream->signal))
10231028
pipe_ctx->stream_res.stream_enc->funcs->dp_blank(pipe_ctx->stream_res.stream_enc);

‎drivers/gpu/drm/radeon/radeon_device.c

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -140,6 +140,10 @@ static struct radeon_px_quirk radeon_px_quirk_list[] = {
140140
* https://bugs.freedesktop.org/show_bug.cgi?id=101491
141141
*/
142142
{ PCI_VENDOR_ID_ATI, 0x6741, 0x1043, 0x2122, RADEON_PX_QUIRK_DISABLE_PX },
143+
/* Asus K73TK laptop with AMD A6-3420M APU and Radeon 7670m GPU
144+
* https://bugzilla.kernel.org/show_bug.cgi?id=51381#c52
145+
*/
146+
{ PCI_VENDOR_ID_ATI, 0x6840, 0x1043, 0x2123, RADEON_PX_QUIRK_DISABLE_PX },
143147
{ 0, 0, 0, 0, 0 },
144148
};
145149

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