Skip to content

Commit a17d94f

Browse files
sjg20Samuel Ortiz
authored andcommitted
mfd: Add ChromeOS EC SPI driver
This uses a SPI bus to talk to the ChromeOS EC. The protocol is defined by the EC and is fairly simple, with a length byte, checksum, command byte and version byte (to permit easy creation of new commands). Signed-off-by: Simon Glass <[email protected]> Signed-off-by: Samuel Ortiz <[email protected]>
1 parent 8996900 commit a17d94f

File tree

3 files changed

+386
-0
lines changed

3 files changed

+386
-0
lines changed

drivers/mfd/Kconfig

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -39,6 +39,16 @@ config MFD_CROS_EC_I2C
3939
a checksum. Failing accesses will be retried three times to
4040
improve reliability.
4141

42+
config MFD_CROS_EC_SPI
43+
tristate "ChromeOS Embedded Controller (SPI)"
44+
depends on MFD_CROS_EC && SPI
45+
46+
---help---
47+
If you say Y here, you get support for talking to the ChromeOS EC
48+
through a SPI bus, using a byte-level protocol. Since the EC's
49+
response time cannot be guaranteed, we support ignoring
50+
'pre-amble' bytes before the response actually starts.
51+
4252
config MFD_88PM800
4353
tristate "Support Marvell 88PM800"
4454
depends on I2C=y && GENERIC_HARDIRQS

drivers/mfd/Makefile

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -10,6 +10,7 @@ obj-$(CONFIG_MFD_SM501) += sm501.o
1010
obj-$(CONFIG_MFD_ASIC3) += asic3.o tmio_core.o
1111
obj-$(CONFIG_MFD_CROS_EC) += cros_ec.o
1212
obj-$(CONFIG_MFD_CROS_EC_I2C) += cros_ec_i2c.o
13+
obj-$(CONFIG_MFD_CROS_EC_SPI) += cros_ec_spi.o
1314

1415
rtsx_pci-objs := rtsx_pcr.o rts5209.o rts5229.o rtl8411.o rts5227.o
1516
obj-$(CONFIG_MFD_RTSX_PCI) += rtsx_pci.o

0 commit comments

Comments
 (0)