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mpempe
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Merge branch 'topic/ppc-kvm' into next
This brings in two series from Paul, one of which touches KVM code and may need to be merged into the kvm-ppc tree to resolve conflicts.
2 parents 78e5dfe + 681c617 commit a26cf1c

27 files changed

+842
-136
lines changed

‎arch/powerpc/include/asm/asm-prototypes.h

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -138,4 +138,7 @@ extern int __ucmpdi2(u64, u64);
138138
void _mcount(void);
139139
unsigned long prepare_ftrace_return(unsigned long parent, unsigned long ip);
140140

141+
void pnv_power9_force_smt4_catch(void);
142+
void pnv_power9_force_smt4_release(void);
143+
141144
#endif /* _ASM_POWERPC_ASM_PROTOTYPES_H */

‎arch/powerpc/include/asm/cputable.h

Lines changed: 117 additions & 113 deletions
Large diffs are not rendered by default.

‎arch/powerpc/include/asm/kvm_asm.h

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -108,6 +108,8 @@
108108

109109
/* book3s_hv */
110110

111+
#define BOOK3S_INTERRUPT_HV_SOFTPATCH 0x1500
112+
111113
/*
112114
* Special trap used to indicate to host that this is a
113115
* passthrough interrupt that could not be handled

‎arch/powerpc/include/asm/kvm_book3s.h

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -241,6 +241,10 @@ extern void kvmppc_update_lpcr(struct kvm *kvm, unsigned long lpcr,
241241
unsigned long mask);
242242
extern void kvmppc_set_fscr(struct kvm_vcpu *vcpu, u64 fscr);
243243

244+
extern int kvmhv_p9_tm_emulation_early(struct kvm_vcpu *vcpu);
245+
extern int kvmhv_p9_tm_emulation(struct kvm_vcpu *vcpu);
246+
extern void kvmhv_emulate_tm_rollback(struct kvm_vcpu *vcpu);
247+
244248
extern void kvmppc_entry_trampoline(void);
245249
extern void kvmppc_hv_entry_trampoline(void);
246250
extern u32 kvmppc_alignment_dsisr(struct kvm_vcpu *vcpu, unsigned int inst);

‎arch/powerpc/include/asm/kvm_book3s_64.h

Lines changed: 43 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -472,6 +472,49 @@ static inline void set_dirty_bits_atomic(unsigned long *map, unsigned long i,
472472
set_bit_le(i, map);
473473
}
474474

475+
static inline u64 sanitize_msr(u64 msr)
476+
{
477+
msr &= ~MSR_HV;
478+
msr |= MSR_ME;
479+
return msr;
480+
}
481+
482+
#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
483+
static inline void copy_from_checkpoint(struct kvm_vcpu *vcpu)
484+
{
485+
vcpu->arch.cr = vcpu->arch.cr_tm;
486+
vcpu->arch.xer = vcpu->arch.xer_tm;
487+
vcpu->arch.lr = vcpu->arch.lr_tm;
488+
vcpu->arch.ctr = vcpu->arch.ctr_tm;
489+
vcpu->arch.amr = vcpu->arch.amr_tm;
490+
vcpu->arch.ppr = vcpu->arch.ppr_tm;
491+
vcpu->arch.dscr = vcpu->arch.dscr_tm;
492+
vcpu->arch.tar = vcpu->arch.tar_tm;
493+
memcpy(vcpu->arch.gpr, vcpu->arch.gpr_tm,
494+
sizeof(vcpu->arch.gpr));
495+
vcpu->arch.fp = vcpu->arch.fp_tm;
496+
vcpu->arch.vr = vcpu->arch.vr_tm;
497+
vcpu->arch.vrsave = vcpu->arch.vrsave_tm;
498+
}
499+
500+
static inline void copy_to_checkpoint(struct kvm_vcpu *vcpu)
501+
{
502+
vcpu->arch.cr_tm = vcpu->arch.cr;
503+
vcpu->arch.xer_tm = vcpu->arch.xer;
504+
vcpu->arch.lr_tm = vcpu->arch.lr;
505+
vcpu->arch.ctr_tm = vcpu->arch.ctr;
506+
vcpu->arch.amr_tm = vcpu->arch.amr;
507+
vcpu->arch.ppr_tm = vcpu->arch.ppr;
508+
vcpu->arch.dscr_tm = vcpu->arch.dscr;
509+
vcpu->arch.tar_tm = vcpu->arch.tar;
510+
memcpy(vcpu->arch.gpr_tm, vcpu->arch.gpr,
511+
sizeof(vcpu->arch.gpr));
512+
vcpu->arch.fp_tm = vcpu->arch.fp;
513+
vcpu->arch.vr_tm = vcpu->arch.vr;
514+
vcpu->arch.vrsave_tm = vcpu->arch.vrsave;
515+
}
516+
#endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
517+
475518
#endif /* CONFIG_KVM_BOOK3S_HV_POSSIBLE */
476519

477520
#endif /* __ASM_KVM_BOOK3S_64_H__ */

‎arch/powerpc/include/asm/kvm_book3s_asm.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -119,6 +119,7 @@ struct kvmppc_host_state {
119119
u8 host_ipi;
120120
u8 ptid; /* thread number within subcore when split */
121121
u8 tid; /* thread number within whole core */
122+
u8 fake_suspend;
122123
struct kvm_vcpu *kvm_vcpu;
123124
struct kvmppc_vcore *kvm_vcore;
124125
void __iomem *xics_phys;

‎arch/powerpc/include/asm/kvm_host.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -610,6 +610,7 @@ struct kvm_vcpu_arch {
610610
u64 tfhar;
611611
u64 texasr;
612612
u64 tfiar;
613+
u64 orig_texasr;
613614

614615
u32 cr_tm;
615616
u64 xer_tm;

‎arch/powerpc/include/asm/paca.h

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -32,6 +32,7 @@
3232
#include <asm/accounting.h>
3333
#include <asm/hmi.h>
3434
#include <asm/cpuidle.h>
35+
#include <asm/atomic.h>
3536

3637
register struct paca_struct *local_paca asm("r13");
3738

@@ -177,6 +178,8 @@ struct paca_struct {
177178
u8 thread_mask;
178179
/* Mask to denote subcore sibling threads */
179180
u8 subcore_sibling_mask;
181+
/* Flag to request this thread not to stop */
182+
atomic_t dont_stop;
180183
/*
181184
* Pointer to an array which contains pointer
182185
* to the sibling threads' paca.

‎arch/powerpc/include/asm/powernv.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -40,6 +40,7 @@ static inline int pnv_npu2_handle_fault(struct npu_context *context,
4040
}
4141

4242
static inline void pnv_tm_init(void) { }
43+
static inline void pnv_power9_force_smt4(void) { }
4344
#endif
4445

4546
#endif /* _ASM_POWERNV_H */

‎arch/powerpc/include/asm/ppc-opcode.h

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -232,15 +232,18 @@
232232
#define PPC_INST_MSGSYNC 0x7c0006ec
233233
#define PPC_INST_MSGSNDP 0x7c00011c
234234
#define PPC_INST_MSGCLRP 0x7c00015c
235+
#define PPC_INST_MTMSRD 0x7c000164
235236
#define PPC_INST_MTTMR 0x7c0003dc
236237
#define PPC_INST_NOP 0x60000000
237238
#define PPC_INST_PASTE 0x7c20070d
238239
#define PPC_INST_POPCNTB 0x7c0000f4
239240
#define PPC_INST_POPCNTB_MASK 0xfc0007fe
240241
#define PPC_INST_POPCNTD 0x7c0003f4
241242
#define PPC_INST_POPCNTW 0x7c0002f4
243+
#define PPC_INST_RFEBB 0x4c000124
242244
#define PPC_INST_RFCI 0x4c000066
243245
#define PPC_INST_RFDI 0x4c00004e
246+
#define PPC_INST_RFID 0x4c000024
244247
#define PPC_INST_RFMCI 0x4c00004c
245248
#define PPC_INST_MFSPR 0x7c0002a6
246249
#define PPC_INST_MFSPR_DSCR 0x7c1102a6
@@ -278,6 +281,7 @@
278281
#define PPC_INST_TRECHKPT 0x7c0007dd
279282
#define PPC_INST_TRECLAIM 0x7c00075d
280283
#define PPC_INST_TABORT 0x7c00071d
284+
#define PPC_INST_TSR 0x7c0005dd
281285

282286
#define PPC_INST_NAP 0x4c000364
283287
#define PPC_INST_SLEEP 0x4c0003a4

‎arch/powerpc/include/asm/reg.h

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -156,6 +156,8 @@
156156
#define PSSCR_SD 0x00400000 /* Status Disable */
157157
#define PSSCR_PLS 0xf000000000000000 /* Power-saving Level Status */
158158
#define PSSCR_GUEST_VIS 0xf0000000000003ff /* Guest-visible PSSCR fields */
159+
#define PSSCR_FAKE_SUSPEND 0x00000400 /* Fake-suspend bit (P9 DD2.2) */
160+
#define PSSCR_FAKE_SUSPEND_LG 10 /* Fake-suspend bit position */
159161

160162
/* Floating Point Status and Control Register (FPSCR) Fields */
161163
#define FPSCR_FX 0x80000000 /* FPU exception summary */
@@ -237,7 +239,12 @@
237239
#define SPRN_TFIAR 0x81 /* Transaction Failure Inst Addr */
238240
#define SPRN_TEXASR 0x82 /* Transaction EXception & Summary */
239241
#define SPRN_TEXASRU 0x83 /* '' '' '' Upper 32 */
242+
#define TEXASR_ABORT __MASK(63-31) /* terminated by tabort or treclaim */
243+
#define TEXASR_SUSP __MASK(63-32) /* tx failed in suspended state */
244+
#define TEXASR_HV __MASK(63-34) /* MSR[HV] when failure occurred */
245+
#define TEXASR_PR __MASK(63-35) /* MSR[PR] when failure occurred */
240246
#define TEXASR_FS __MASK(63-36) /* TEXASR Failure Summary */
247+
#define TEXASR_EXACT __MASK(63-37) /* TFIAR value is exact */
241248
#define SPRN_TFHAR 0x80 /* Transaction Failure Handler Addr */
242249
#define SPRN_TIDR 144 /* Thread ID register */
243250
#define SPRN_CTRLF 0x088

‎arch/powerpc/include/asm/time.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -47,7 +47,7 @@ struct div_result {
4747
/* Accessor functions for the timebase (RTC on 601) registers. */
4848
/* If one day CONFIG_POWER is added just define __USE_RTC as 1 */
4949
#ifdef CONFIG_6xx
50-
#define __USE_RTC() (!cpu_has_feature(CPU_FTR_USE_TB))
50+
#define __USE_RTC() (cpu_has_feature(CPU_FTR_USE_RTC))
5151
#else
5252
#define __USE_RTC() 0
5353
#endif

‎arch/powerpc/kernel/asm-offsets.c

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -568,6 +568,7 @@ int main(void)
568568
OFFSET(VCPU_TFHAR, kvm_vcpu, arch.tfhar);
569569
OFFSET(VCPU_TFIAR, kvm_vcpu, arch.tfiar);
570570
OFFSET(VCPU_TEXASR, kvm_vcpu, arch.texasr);
571+
OFFSET(VCPU_ORIG_TEXASR, kvm_vcpu, arch.orig_texasr);
571572
OFFSET(VCPU_GPR_TM, kvm_vcpu, arch.gpr_tm);
572573
OFFSET(VCPU_FPRS_TM, kvm_vcpu, arch.fp_tm.fpr);
573574
OFFSET(VCPU_VRS_TM, kvm_vcpu, arch.vr_tm.vr);
@@ -650,6 +651,7 @@ int main(void)
650651
HSTATE_FIELD(HSTATE_HOST_IPI, host_ipi);
651652
HSTATE_FIELD(HSTATE_PTID, ptid);
652653
HSTATE_FIELD(HSTATE_TID, tid);
654+
HSTATE_FIELD(HSTATE_FAKE_SUSPEND, fake_suspend);
653655
HSTATE_FIELD(HSTATE_MMCR0, host_mmcr[0]);
654656
HSTATE_FIELD(HSTATE_MMCR1, host_mmcr[1]);
655657
HSTATE_FIELD(HSTATE_MMCRA, host_mmcr[2]);
@@ -759,6 +761,7 @@ int main(void)
759761
OFFSET(PACA_SUBCORE_SIBLING_MASK, paca_struct, subcore_sibling_mask);
760762
OFFSET(PACA_SIBLING_PACA_PTRS, paca_struct, thread_sibling_pacas);
761763
OFFSET(PACA_REQ_PSSCR, paca_struct, requested_psscr);
764+
OFFSET(PACA_DONT_STOP, paca_struct, dont_stop);
762765
#define STOP_SPR(x, f) OFFSET(x, paca_struct, stop_sprs.f)
763766
STOP_SPR(STOP_PID, pid);
764767
STOP_SPR(STOP_LDBAR, ldbar);

‎arch/powerpc/kernel/cpu_setup_6xx.S

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -226,7 +226,7 @@ BEGIN_FTR_SECTION
226226
beq 1f
227227
END_FTR_SECTION_IFSET(CPU_FTR_L3CR)
228228
lwz r6,CPU_SPEC_FEATURES(r4)
229-
andi. r0,r6,CPU_FTR_L3_DISABLE_NAP
229+
andis. r0,r6,CPU_FTR_L3_DISABLE_NAP@h
230230
beq 1f
231231
li r7,CPU_FTR_CAN_NAP
232232
andc r6,r6,r7

‎arch/powerpc/kernel/cpu_setup_fsl_booke.S

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -162,7 +162,7 @@ _GLOBAL(__setup_cpu_e5500)
162162
* the feature on the primary core, avoid doing it on the
163163
* secondary core.
164164
*/
165-
andis. r6, r3, CPU_FTR_EMB_HV@h
165+
andi. r6, r3, CPU_FTR_EMB_HV
166166
beq 2f
167167
rlwinm r3, r3, 0, ~CPU_FTR_EMB_HV
168168
stw r3, CPU_SPEC_FEATURES(r4)

‎arch/powerpc/kernel/cputable.c

Lines changed: 21 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -553,11 +553,30 @@ static struct cpu_spec __initdata cpu_specs[] = {
553553
.machine_check_early = __machine_check_early_realmode_p9,
554554
.platform = "power9",
555555
},
556-
{ /* Power9 DD 2.1 or later (see DD2.0 above) */
556+
{ /* Power9 DD 2.1 */
557+
.pvr_mask = 0xffffefff,
558+
.pvr_value = 0x004e0201,
559+
.cpu_name = "POWER9 (raw)",
560+
.cpu_features = CPU_FTRS_POWER9_DD2_1,
561+
.cpu_user_features = COMMON_USER_POWER9,
562+
.cpu_user_features2 = COMMON_USER2_POWER9,
563+
.mmu_features = MMU_FTRS_POWER9,
564+
.icache_bsize = 128,
565+
.dcache_bsize = 128,
566+
.num_pmcs = 6,
567+
.pmc_type = PPC_PMC_IBM,
568+
.oprofile_cpu_type = "ppc64/power9",
569+
.oprofile_type = PPC_OPROFILE_INVALID,
570+
.cpu_setup = __setup_cpu_power9,
571+
.cpu_restore = __restore_cpu_power9,
572+
.machine_check_early = __machine_check_early_realmode_p9,
573+
.platform = "power9",
574+
},
575+
{ /* Power9 DD2.2 or later */
557576
.pvr_mask = 0xffff0000,
558577
.pvr_value = 0x004e0000,
559578
.cpu_name = "POWER9 (raw)",
560-
.cpu_features = CPU_FTRS_POWER9_DD2_1,
579+
.cpu_features = CPU_FTRS_POWER9_DD2_2,
561580
.cpu_user_features = COMMON_USER_POWER9,
562581
.cpu_user_features2 = COMMON_USER2_POWER9,
563582
.mmu_features = MMU_FTRS_POWER9,

‎arch/powerpc/kernel/dt_cpu_ftrs.c

Lines changed: 6 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -54,8 +54,7 @@ struct dt_cpu_feature {
5454
};
5555

5656
#define CPU_FTRS_BASE \
57-
(CPU_FTR_USE_TB | \
58-
CPU_FTR_LWSYNC | \
57+
(CPU_FTR_LWSYNC | \
5958
CPU_FTR_FPU_UNAVAILABLE |\
6059
CPU_FTR_NODSISRALIGN |\
6160
CPU_FTR_NOEXECUTE |\
@@ -590,6 +589,8 @@ static struct dt_cpu_feature_match __initdata
590589
{"virtual-page-class-key-protection", feat_enable, 0},
591590
{"transactional-memory", feat_enable_tm, CPU_FTR_TM},
592591
{"transactional-memory-v3", feat_enable_tm, 0},
592+
{"tm-suspend-hypervisor-assist", feat_enable, CPU_FTR_P9_TM_HV_ASSIST},
593+
{"tm-suspend-xer-so-bug", feat_enable, CPU_FTR_P9_TM_XER_SO_BUG},
593594
{"idle-nap", feat_enable_idle_nap, 0},
594595
{"alignment-interrupt-dsisr", feat_enable_align_dsisr, 0},
595596
{"idle-stop", feat_enable_idle_stop, 0},
@@ -709,6 +710,9 @@ static __init void cpufeatures_cpu_quirks(void)
709710
cur_cpu_spec->cpu_features |= CPU_FTR_POWER9_DD1;
710711
else if ((version & 0xffffefff) == 0x004e0201)
711712
cur_cpu_spec->cpu_features |= CPU_FTR_POWER9_DD2_1;
713+
else if ((version & 0xffffefff) == 0x004e0202)
714+
cur_cpu_spec->cpu_features |= CPU_FTR_P9_TM_HV_ASSIST |
715+
CPU_FTR_P9_TM_XER_SO_BUG;
712716
}
713717

714718
static void __init cpufeatures_setup_finished(void)

‎arch/powerpc/kernel/exceptions-64s.S

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1273,7 +1273,7 @@ EXC_REAL_BEGIN(denorm_exception_hv, 0x1500, 0x100)
12731273
bne+ denorm_assist
12741274
#endif
12751275

1276-
KVMTEST_PR(0x1500)
1276+
KVMTEST_HV(0x1500)
12771277
EXCEPTION_PROLOG_PSERIES_1(denorm_common, EXC_HV)
12781278
EXC_REAL_END(denorm_exception_hv, 0x1500, 0x100)
12791279

@@ -1285,7 +1285,7 @@ EXC_VIRT_END(denorm_exception, 0x5500, 0x100)
12851285
EXC_VIRT_NONE(0x5500, 0x100)
12861286
#endif
12871287

1288-
TRAMP_KVM_SKIP(PACA_EXGEN, 0x1500)
1288+
TRAMP_KVM_HV(PACA_EXGEN, 0x1500)
12891289

12901290
#ifdef CONFIG_PPC_DENORMALISATION
12911291
TRAMP_REAL_BEGIN(denorm_assist)

‎arch/powerpc/kernel/idle_book3s.S

Lines changed: 21 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -339,6 +339,7 @@ power_enter_stop:
339339
bne .Lhandle_esl_ec_set
340340
PPC_STOP
341341
li r3,0 /* Since we didn't lose state, return 0 */
342+
std r3, PACA_REQ_PSSCR(r13)
342343

343344
/*
344345
* pnv_wakeup_noloss() expects r12 to contain the SRR1 value so
@@ -429,11 +430,29 @@ ALT_FTR_SECTION_END_NESTED_IFSET(CPU_FTR_ARCH_207S, 66); \
429430
* r3 contains desired PSSCR register value.
430431
*/
431432
_GLOBAL(power9_idle_stop)
433+
BEGIN_FTR_SECTION
434+
lwz r5, PACA_DONT_STOP(r13)
435+
cmpwi r5, 0
436+
bne 1f
432437
std r3, PACA_REQ_PSSCR(r13)
438+
sync
439+
lwz r5, PACA_DONT_STOP(r13)
440+
cmpwi r5, 0
441+
bne 1f
442+
END_FTR_SECTION_IFSET(CPU_FTR_P9_TM_XER_SO_BUG)
433443
mtspr SPRN_PSSCR,r3
434444
LOAD_REG_ADDR(r4,power_enter_stop)
435445
b pnv_powersave_common
436446
/* No return */
447+
1:
448+
/*
449+
* We get here when TM / thread reconfiguration bug workaround
450+
* code wants to get the CPU into SMT4 mode, and therefore
451+
* we are being asked not to stop.
452+
*/
453+
li r3, 0
454+
std r3, PACA_REQ_PSSCR(r13)
455+
blr /* return 0 for wakeup cause / SRR1 value */
437456

438457
/*
439458
* On waking up from stop 0,1,2 with ESL=1 on POWER9 DD1,
@@ -584,6 +603,8 @@ FTR_SECTION_ELSE_NESTED(71)
584603
mfspr r5, SPRN_PSSCR
585604
rldicl r5,r5,4,60
586605
ALT_FTR_SECTION_END_NESTED_IFSET(CPU_FTR_POWER9_DD1, 71)
606+
li r0, 0 /* clear requested_psscr to say we're awake */
607+
std r0, PACA_REQ_PSSCR(r13)
587608
cmpd cr4,r5,r4
588609
bge cr4,pnv_wakeup_tb_loss /* returns to caller */
589610

‎arch/powerpc/kernel/vdso.c

Lines changed: 7 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -99,26 +99,28 @@ static struct vdso_patch_def vdso_patches[] = {
9999
CPU_FTR_COHERENT_ICACHE, CPU_FTR_COHERENT_ICACHE,
100100
"__kernel_sync_dicache", "__kernel_sync_dicache_p5"
101101
},
102+
#ifdef CONFIG_PPC32
102103
{
103-
CPU_FTR_USE_TB, 0,
104+
CPU_FTR_USE_RTC, CPU_FTR_USE_RTC,
104105
"__kernel_gettimeofday", NULL
105106
},
106107
{
107-
CPU_FTR_USE_TB, 0,
108+
CPU_FTR_USE_RTC, CPU_FTR_USE_RTC,
108109
"__kernel_clock_gettime", NULL
109110
},
110111
{
111-
CPU_FTR_USE_TB, 0,
112+
CPU_FTR_USE_RTC, CPU_FTR_USE_RTC,
112113
"__kernel_clock_getres", NULL
113114
},
114115
{
115-
CPU_FTR_USE_TB, 0,
116+
CPU_FTR_USE_RTC, CPU_FTR_USE_RTC,
116117
"__kernel_get_tbfreq", NULL
117118
},
118119
{
119-
CPU_FTR_USE_TB, 0,
120+
CPU_FTR_USE_RTC, CPU_FTR_USE_RTC,
120121
"__kernel_time", NULL
121122
},
123+
#endif
122124
};
123125

124126
/*

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