@@ -279,6 +279,8 @@ static int mlx5_internal_err_ret_value(struct mlx5_core_dev *dev, u16 op,
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case MLX5_CMD_OP_DESTROY_XRC_SRQ :
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case MLX5_CMD_OP_DESTROY_DCT :
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case MLX5_CMD_OP_DEALLOC_Q_COUNTER :
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+ case MLX5_CMD_OP_DESTROY_SCHEDULING_ELEMENT :
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+ case MLX5_CMD_OP_DESTROY_QOS_PARA_VPORT :
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case MLX5_CMD_OP_DEALLOC_PD :
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case MLX5_CMD_OP_DEALLOC_UAR :
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case MLX5_CMD_OP_DETACH_FROM_MCG :
@@ -305,8 +307,6 @@ static int mlx5_internal_err_ret_value(struct mlx5_core_dev *dev, u16 op,
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case MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY :
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case MLX5_CMD_OP_SET_FLOW_TABLE_ROOT :
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case MLX5_CMD_OP_DEALLOC_ENCAP_HEADER :
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- case MLX5_CMD_OP_DESTROY_SCHEDULING_ELEMENT :
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- case MLX5_CMD_OP_DESTROY_QOS_PARA_VPORT :
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return MLX5_CMD_STAT_OK ;
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case MLX5_CMD_OP_QUERY_HCA_CAP :
@@ -363,6 +363,10 @@ static int mlx5_internal_err_ret_value(struct mlx5_core_dev *dev, u16 op,
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case MLX5_CMD_OP_QUERY_Q_COUNTER :
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case MLX5_CMD_OP_SET_RATE_LIMIT :
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case MLX5_CMD_OP_QUERY_RATE_LIMIT :
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+ case MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT :
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+ case MLX5_CMD_OP_QUERY_SCHEDULING_ELEMENT :
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+ case MLX5_CMD_OP_MODIFY_SCHEDULING_ELEMENT :
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+ case MLX5_CMD_OP_CREATE_QOS_PARA_VPORT :
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case MLX5_CMD_OP_ALLOC_PD :
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case MLX5_CMD_OP_ALLOC_UAR :
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case MLX5_CMD_OP_CONFIG_INT_MODERATION :
@@ -414,10 +418,6 @@ static int mlx5_internal_err_ret_value(struct mlx5_core_dev *dev, u16 op,
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case MLX5_CMD_OP_ALLOC_FLOW_COUNTER :
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case MLX5_CMD_OP_QUERY_FLOW_COUNTER :
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case MLX5_CMD_OP_ALLOC_ENCAP_HEADER :
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- case MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT :
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- case MLX5_CMD_OP_QUERY_SCHEDULING_ELEMENT :
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- case MLX5_CMD_OP_MODIFY_SCHEDULING_ELEMENT :
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- case MLX5_CMD_OP_CREATE_QOS_PARA_VPORT :
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* status = MLX5_DRIVER_STATUS_ABORTED ;
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* synd = MLX5_DRIVER_SYND ;
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return - EIO ;
@@ -501,6 +501,12 @@ const char *mlx5_command_str(int command)
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MLX5_COMMAND_STR_CASE (QUERY_Q_COUNTER );
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MLX5_COMMAND_STR_CASE (SET_RATE_LIMIT );
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MLX5_COMMAND_STR_CASE (QUERY_RATE_LIMIT );
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+ MLX5_COMMAND_STR_CASE (CREATE_SCHEDULING_ELEMENT );
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+ MLX5_COMMAND_STR_CASE (DESTROY_SCHEDULING_ELEMENT );
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+ MLX5_COMMAND_STR_CASE (QUERY_SCHEDULING_ELEMENT );
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+ MLX5_COMMAND_STR_CASE (MODIFY_SCHEDULING_ELEMENT );
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+ MLX5_COMMAND_STR_CASE (CREATE_QOS_PARA_VPORT );
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+ MLX5_COMMAND_STR_CASE (DESTROY_QOS_PARA_VPORT );
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MLX5_COMMAND_STR_CASE (ALLOC_PD );
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MLX5_COMMAND_STR_CASE (DEALLOC_PD );
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MLX5_COMMAND_STR_CASE (ALLOC_UAR );
@@ -576,12 +582,6 @@ const char *mlx5_command_str(int command)
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MLX5_COMMAND_STR_CASE (MODIFY_FLOW_TABLE );
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MLX5_COMMAND_STR_CASE (ALLOC_ENCAP_HEADER );
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MLX5_COMMAND_STR_CASE (DEALLOC_ENCAP_HEADER );
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- MLX5_COMMAND_STR_CASE (CREATE_SCHEDULING_ELEMENT );
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- MLX5_COMMAND_STR_CASE (DESTROY_SCHEDULING_ELEMENT );
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- MLX5_COMMAND_STR_CASE (QUERY_SCHEDULING_ELEMENT );
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- MLX5_COMMAND_STR_CASE (MODIFY_SCHEDULING_ELEMENT );
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- MLX5_COMMAND_STR_CASE (CREATE_QOS_PARA_VPORT );
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- MLX5_COMMAND_STR_CASE (DESTROY_QOS_PARA_VPORT );
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default : return "unknown command opcode" ;
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}
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}
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