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Suresh Vankadarahverkuil
Suresh Vankadara
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hverkuil
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media: qcom: camss: Add support for camss driver on sc7280
Add support for the camss driver on the sc7280 soc. Signed-off-by: Suresh Vankadara <[email protected]> Signed-off-by: Trishansh Bhardwaj <[email protected]> Signed-off-by: Vikram Sharma <[email protected]> Reviewed-by: Bryan O'Donoghue <[email protected]> Tested-by: Luca Weiss <[email protected]> Signed-off-by: Hans Verkuil <[email protected]>
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‎drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -505,6 +505,10 @@ static void csiphy_gen2_config_lanes(struct csiphy_device *csiphy,
505505
u32 val;
506506

507507
switch (csiphy->camss->res->version) {
508+
case CAMSS_7280:
509+
r = &lane_regs_sm8250[0][0];
510+
array_size = ARRAY_SIZE(lane_regs_sm8250[0]);
511+
break;
508512
case CAMSS_8250:
509513
r = &lane_regs_sm8250[0][0];
510514
array_size = ARRAY_SIZE(lane_regs_sm8250[0]);
@@ -557,6 +561,7 @@ static bool csiphy_is_gen2(u32 version)
557561
bool ret = false;
558562

559563
switch (version) {
564+
case CAMSS_7280:
560565
case CAMSS_8250:
561566
case CAMSS_8280XP:
562567
case CAMSS_845:

‎drivers/media/platform/qcom/camss/camss-csiphy.c

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -103,6 +103,11 @@ const struct csiphy_formats csiphy_formats_8x96 = {
103103
.formats = formats_8x96
104104
};
105105

106+
const struct csiphy_formats csiphy_formats_sc7280 = {
107+
.nformats = ARRAY_SIZE(formats_sdm845),
108+
.formats = formats_sdm845
109+
};
110+
106111
const struct csiphy_formats csiphy_formats_sdm845 = {
107112
.nformats = ARRAY_SIZE(formats_sdm845),
108113
.formats = formats_sdm845

‎drivers/media/platform/qcom/camss/camss-csiphy.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -117,6 +117,7 @@ void msm_csiphy_unregister_entity(struct csiphy_device *csiphy);
117117

118118
extern const struct csiphy_formats csiphy_formats_8x16;
119119
extern const struct csiphy_formats csiphy_formats_8x96;
120+
extern const struct csiphy_formats csiphy_formats_sc7280;
120121
extern const struct csiphy_formats csiphy_formats_sdm845;
121122

122123
extern const struct csiphy_hw_ops csiphy_ops_2ph_1_0;

‎drivers/media/platform/qcom/camss/camss-vfe.c

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -335,6 +335,7 @@ static u32 vfe_src_pad_code(struct vfe_line *line, u32 sink_code,
335335
}
336336
break;
337337
case CAMSS_660:
338+
case CAMSS_7280:
338339
case CAMSS_8x96:
339340
case CAMSS_8250:
340341
case CAMSS_8280XP:
@@ -1693,6 +1694,7 @@ static int vfe_bpl_align(struct vfe_device *vfe)
16931694
int ret = 8;
16941695

16951696
switch (vfe->camss->res->version) {
1697+
case CAMSS_7280:
16961698
case CAMSS_8250:
16971699
case CAMSS_8280XP:
16981700
case CAMSS_845:

‎drivers/media/platform/qcom/camss/camss.c

Lines changed: 319 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1266,6 +1266,310 @@ static const struct resources_icc icc_res_sm8250[] = {
12661266
},
12671267
};
12681268

1269+
static const struct camss_subdev_resources csiphy_res_7280[] = {
1270+
/* CSIPHY0 */
1271+
{
1272+
.regulators = { "vdda-phy", "vdda-pll" },
1273+
1274+
.clock = { "csiphy0", "csiphy0_timer" },
1275+
.clock_rate = { { 300000000, 400000000 },
1276+
{ 300000000 } },
1277+
.reg = { "csiphy0" },
1278+
.interrupt = { "csiphy0" },
1279+
.csiphy = {
1280+
.hw_ops = &csiphy_ops_3ph_1_0,
1281+
.formats = &csiphy_formats_sc7280
1282+
}
1283+
},
1284+
/* CSIPHY1 */
1285+
{
1286+
.regulators = { "vdda-phy", "vdda-pll" },
1287+
1288+
.clock = { "csiphy1", "csiphy1_timer" },
1289+
.clock_rate = { { 300000000, 400000000 },
1290+
{ 300000000 } },
1291+
.reg = { "csiphy1" },
1292+
.interrupt = { "csiphy1" },
1293+
.csiphy = {
1294+
.hw_ops = &csiphy_ops_3ph_1_0,
1295+
.formats = &csiphy_formats_sc7280
1296+
}
1297+
},
1298+
/* CSIPHY2 */
1299+
{
1300+
.regulators = { "vdda-phy", "vdda-pll" },
1301+
1302+
.clock = { "csiphy2", "csiphy2_timer" },
1303+
.clock_rate = { { 300000000, 400000000 },
1304+
{ 300000000 } },
1305+
.reg = { "csiphy2" },
1306+
.interrupt = { "csiphy2" },
1307+
.csiphy = {
1308+
.hw_ops = &csiphy_ops_3ph_1_0,
1309+
.formats = &csiphy_formats_sc7280
1310+
}
1311+
},
1312+
/* CSIPHY3 */
1313+
{
1314+
.regulators = { "vdda-phy", "vdda-pll" },
1315+
1316+
.clock = { "csiphy3", "csiphy3_timer" },
1317+
.clock_rate = { { 300000000, 400000000 },
1318+
{ 300000000 } },
1319+
.reg = { "csiphy3" },
1320+
.interrupt = { "csiphy3" },
1321+
.csiphy = {
1322+
.hw_ops = &csiphy_ops_3ph_1_0,
1323+
.formats = &csiphy_formats_sc7280
1324+
}
1325+
},
1326+
/* CSIPHY4 */
1327+
{
1328+
.regulators = { "vdda-phy", "vdda-pll" },
1329+
1330+
.clock = { "csiphy4", "csiphy4_timer" },
1331+
.clock_rate = { { 300000000, 400000000 },
1332+
{ 300000000 } },
1333+
.reg = { "csiphy4" },
1334+
.interrupt = { "csiphy4" },
1335+
.csiphy = {
1336+
.hw_ops = &csiphy_ops_3ph_1_0,
1337+
.formats = &csiphy_formats_sc7280
1338+
}
1339+
},
1340+
};
1341+
1342+
static const struct camss_subdev_resources csid_res_7280[] = {
1343+
/* CSID0 */
1344+
{
1345+
.regulators = {},
1346+
1347+
.clock = { "vfe0_csid", "vfe0_cphy_rx", "vfe0" },
1348+
.clock_rate = { { 300000000, 400000000 },
1349+
{ 0 },
1350+
{ 380000000, 510000000, 637000000, 760000000 }
1351+
},
1352+
1353+
.reg = { "csid0" },
1354+
.interrupt = { "csid0" },
1355+
.csid = {
1356+
.is_lite = false,
1357+
.hw_ops = &csid_ops_gen2,
1358+
.parent_dev_ops = &vfe_parent_dev_ops,
1359+
.formats = &csid_formats_gen2
1360+
}
1361+
},
1362+
/* CSID1 */
1363+
{
1364+
.regulators = {},
1365+
1366+
.clock = { "vfe1_csid", "vfe1_cphy_rx", "vfe1" },
1367+
.clock_rate = { { 300000000, 400000000 },
1368+
{ 0 },
1369+
{ 380000000, 510000000, 637000000, 760000000 }
1370+
},
1371+
1372+
.reg = { "csid1" },
1373+
.interrupt = { "csid1" },
1374+
.csid = {
1375+
.is_lite = false,
1376+
.hw_ops = &csid_ops_gen2,
1377+
.parent_dev_ops = &vfe_parent_dev_ops,
1378+
.formats = &csid_formats_gen2
1379+
}
1380+
},
1381+
/* CSID2 */
1382+
{
1383+
.regulators = {},
1384+
1385+
.clock = { "vfe2_csid", "vfe2_cphy_rx", "vfe2" },
1386+
.clock_rate = { { 300000000, 400000000 },
1387+
{ 0 },
1388+
{ 380000000, 510000000, 637000000, 760000000 }
1389+
},
1390+
1391+
.reg = { "csid2" },
1392+
.interrupt = { "csid2" },
1393+
.csid = {
1394+
.is_lite = false,
1395+
.hw_ops = &csid_ops_gen2,
1396+
.parent_dev_ops = &vfe_parent_dev_ops,
1397+
.formats = &csid_formats_gen2
1398+
}
1399+
},
1400+
/* CSID3 */
1401+
{
1402+
.regulators = {},
1403+
1404+
.clock = { "vfe_lite0_csid", "vfe_lite0_cphy_rx", "vfe_lite0" },
1405+
.clock_rate = { { 300000000, 400000000 },
1406+
{ 0 },
1407+
{ 320000000, 400000000, 480000000, 600000000 }
1408+
},
1409+
1410+
.reg = { "csid_lite0" },
1411+
.interrupt = { "csid_lite0" },
1412+
.csid = {
1413+
.is_lite = true,
1414+
.hw_ops = &csid_ops_gen2,
1415+
.parent_dev_ops = &vfe_parent_dev_ops,
1416+
.formats = &csid_formats_gen2
1417+
}
1418+
},
1419+
/* CSID4 */
1420+
{
1421+
.regulators = {},
1422+
1423+
.clock = { "vfe_lite1_csid", "vfe_lite1_cphy_rx", "vfe_lite1" },
1424+
.clock_rate = { { 300000000, 400000000 },
1425+
{ 0 },
1426+
{ 320000000, 400000000, 480000000, 600000000 }
1427+
},
1428+
1429+
.reg = { "csid_lite1" },
1430+
.interrupt = { "csid_lite1" },
1431+
.csid = {
1432+
.is_lite = true,
1433+
.hw_ops = &csid_ops_gen2,
1434+
.parent_dev_ops = &vfe_parent_dev_ops,
1435+
.formats = &csid_formats_gen2
1436+
}
1437+
},
1438+
};
1439+
1440+
static const struct camss_subdev_resources vfe_res_7280[] = {
1441+
/* VFE0 */
1442+
{
1443+
.regulators = {},
1444+
1445+
.clock = { "camnoc_axi", "cpas_ahb", "icp_ahb", "vfe0",
1446+
"vfe0_axi", "gcc_cam_hf_axi" },
1447+
.clock_rate = { { 150000000, 240000000, 320000000, 400000000, 480000000 },
1448+
{ 80000000 },
1449+
{ 0 },
1450+
{ 380000000, 510000000, 637000000, 760000000 },
1451+
{ 0 },
1452+
{ 0 } },
1453+
1454+
.reg = { "vfe0" },
1455+
.interrupt = { "vfe0" },
1456+
.vfe = {
1457+
.line_num = 3,
1458+
.is_lite = false,
1459+
.has_pd = true,
1460+
.pd_name = "ife0",
1461+
.hw_ops = &vfe_ops_170,
1462+
.formats_rdi = &vfe_formats_rdi_845,
1463+
.formats_pix = &vfe_formats_pix_845
1464+
}
1465+
},
1466+
/* VFE1 */
1467+
{
1468+
.regulators = {},
1469+
1470+
.clock = { "camnoc_axi", "cpas_ahb", "icp_ahb", "vfe1",
1471+
"vfe1_axi", "gcc_cam_hf_axi" },
1472+
.clock_rate = { { 150000000, 240000000, 320000000, 400000000, 480000000 },
1473+
{ 80000000 },
1474+
{ 0 },
1475+
{ 380000000, 510000000, 637000000, 760000000 },
1476+
{ 0 },
1477+
{ 0 } },
1478+
1479+
.reg = { "vfe1" },
1480+
.interrupt = { "vfe1" },
1481+
.vfe = {
1482+
.line_num = 3,
1483+
.is_lite = false,
1484+
.has_pd = true,
1485+
.pd_name = "ife1",
1486+
.hw_ops = &vfe_ops_170,
1487+
.formats_rdi = &vfe_formats_rdi_845,
1488+
.formats_pix = &vfe_formats_pix_845
1489+
}
1490+
},
1491+
/* VFE2 */
1492+
{
1493+
.regulators = {},
1494+
1495+
.clock = { "camnoc_axi", "cpas_ahb", "icp_ahb", "vfe2",
1496+
"vfe2_axi", "gcc_cam_hf_axi" },
1497+
.clock_rate = { { 150000000, 240000000, 320000000, 400000000, 480000000 },
1498+
{ 80000000 },
1499+
{ 0 },
1500+
{ 380000000, 510000000, 637000000, 760000000 },
1501+
{ 0 },
1502+
{ 0 } },
1503+
1504+
.reg = { "vfe2" },
1505+
.interrupt = { "vfe2" },
1506+
.vfe = {
1507+
.line_num = 3,
1508+
.is_lite = false,
1509+
.hw_ops = &vfe_ops_170,
1510+
.has_pd = true,
1511+
.pd_name = "ife2",
1512+
.formats_rdi = &vfe_formats_rdi_845,
1513+
.formats_pix = &vfe_formats_pix_845
1514+
}
1515+
},
1516+
/* VFE3 (lite) */
1517+
{
1518+
.clock = { "camnoc_axi", "cpas_ahb", "icp_ahb",
1519+
"vfe_lite0", "gcc_cam_hf_axi" },
1520+
.clock_rate = { { 150000000, 240000000, 320000000, 400000000, 480000000 },
1521+
{ 80000000 },
1522+
{ 0 },
1523+
{ 320000000, 400000000, 480000000, 600000000 },
1524+
{ 0 } },
1525+
1526+
.regulators = {},
1527+
.reg = { "vfe_lite0" },
1528+
.interrupt = { "vfe_lite0" },
1529+
.vfe = {
1530+
.line_num = 4,
1531+
.is_lite = true,
1532+
.hw_ops = &vfe_ops_170,
1533+
.formats_rdi = &vfe_formats_rdi_845,
1534+
.formats_pix = &vfe_formats_pix_845
1535+
}
1536+
},
1537+
/* VFE4 (lite) */
1538+
{
1539+
.clock = { "camnoc_axi", "cpas_ahb", "icp_ahb",
1540+
"vfe_lite1", "gcc_cam_hf_axi" },
1541+
.clock_rate = { { 150000000, 240000000, 320000000, 400000000, 480000000 },
1542+
{ 80000000 },
1543+
{ 0 },
1544+
{ 320000000, 400000000, 480000000, 600000000 },
1545+
{ 0 } },
1546+
1547+
.regulators = {},
1548+
.reg = { "vfe_lite1" },
1549+
.interrupt = { "vfe_lite1" },
1550+
.vfe = {
1551+
.line_num = 4,
1552+
.is_lite = true,
1553+
.hw_ops = &vfe_ops_170,
1554+
.formats_rdi = &vfe_formats_rdi_845,
1555+
.formats_pix = &vfe_formats_pix_845
1556+
}
1557+
},
1558+
};
1559+
1560+
static const struct resources_icc icc_res_sc7280[] = {
1561+
{
1562+
.name = "ahb",
1563+
.icc_bw_tbl.avg = 38400,
1564+
.icc_bw_tbl.peak = 76800,
1565+
},
1566+
{
1567+
.name = "hf_0",
1568+
.icc_bw_tbl.avg = 2097152,
1569+
.icc_bw_tbl.peak = 2097152,
1570+
},
1571+
};
1572+
12691573
static const struct camss_subdev_resources csiphy_res_sc8280xp[] = {
12701574
/* CSIPHY0 */
12711575
{
@@ -2685,10 +2989,25 @@ static const struct camss_resources sc8280xp_resources = {
26852989
.link_entities = camss_link_entities
26862990
};
26872991

2992+
static const struct camss_resources sc7280_resources = {
2993+
.version = CAMSS_7280,
2994+
.pd_name = "top",
2995+
.csiphy_res = csiphy_res_7280,
2996+
.csid_res = csid_res_7280,
2997+
.vfe_res = vfe_res_7280,
2998+
.icc_res = icc_res_sc7280,
2999+
.icc_path_num = ARRAY_SIZE(icc_res_sc7280),
3000+
.csiphy_num = ARRAY_SIZE(csiphy_res_7280),
3001+
.csid_num = ARRAY_SIZE(csid_res_7280),
3002+
.vfe_num = ARRAY_SIZE(vfe_res_7280),
3003+
.link_entities = camss_link_entities
3004+
};
3005+
26883006
static const struct of_device_id camss_dt_match[] = {
26893007
{ .compatible = "qcom,msm8916-camss", .data = &msm8916_resources },
26903008
{ .compatible = "qcom,msm8953-camss", .data = &msm8953_resources },
26913009
{ .compatible = "qcom,msm8996-camss", .data = &msm8996_resources },
3010+
{ .compatible = "qcom,sc7280-camss", .data = &sc7280_resources },
26923011
{ .compatible = "qcom,sc8280xp-camss", .data = &sc8280xp_resources },
26933012
{ .compatible = "qcom,sdm660-camss", .data = &sdm660_resources },
26943013
{ .compatible = "qcom,sdm845-camss", .data = &sdm845_resources },

‎drivers/media/platform/qcom/camss/camss.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -78,6 +78,7 @@ enum pm_domain {
7878

7979
enum camss_version {
8080
CAMSS_660,
81+
CAMSS_7280,
8182
CAMSS_8x16,
8283
CAMSS_8x53,
8384
CAMSS_8x96,

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