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Icenowymripard
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clk: sunxi-ng: Support fixed post-dividers on NKMP style clocks
On the new Allwinner H6 SoC, multiple PLL's are NMP style clocks (modelled as NKMP with no K) and have fixed post-dividers. Add fixed post divider support to the NKMP style clocks. Signed-off-by: Icenowy Zheng <[email protected]> Signed-off-by: Maxime Ripard <[email protected]>
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+19
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2 files changed

+19
-3
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drivers/clk/sunxi-ng/ccu_nkmp.c

Lines changed: 17 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -95,7 +95,7 @@ static unsigned long ccu_nkmp_recalc_rate(struct clk_hw *hw,
9595
unsigned long parent_rate)
9696
{
9797
struct ccu_nkmp *nkmp = hw_to_ccu_nkmp(hw);
98-
unsigned long n, m, k, p;
98+
unsigned long n, m, k, p, rate;
9999
u32 reg;
100100

101101
reg = readl(nkmp->common.base + nkmp->common.reg);
@@ -121,7 +121,11 @@ static unsigned long ccu_nkmp_recalc_rate(struct clk_hw *hw,
121121
p = reg >> nkmp->p.shift;
122122
p &= (1 << nkmp->p.width) - 1;
123123

124-
return ccu_nkmp_calc_rate(parent_rate, n, k, m, 1 << p);
124+
rate = ccu_nkmp_calc_rate(parent_rate, n, k, m, 1 << p);
125+
if (nkmp->common.features & CCU_FEATURE_FIXED_POSTDIV)
126+
rate /= nkmp->fixed_post_div;
127+
128+
return rate;
125129
}
126130

127131
static long ccu_nkmp_round_rate(struct clk_hw *hw, unsigned long rate,
@@ -130,6 +134,9 @@ static long ccu_nkmp_round_rate(struct clk_hw *hw, unsigned long rate,
130134
struct ccu_nkmp *nkmp = hw_to_ccu_nkmp(hw);
131135
struct _ccu_nkmp _nkmp;
132136

137+
if (nkmp->common.features & CCU_FEATURE_FIXED_POSTDIV)
138+
rate *= nkmp->fixed_post_div;
139+
133140
_nkmp.min_n = nkmp->n.min ?: 1;
134141
_nkmp.max_n = nkmp->n.max ?: 1 << nkmp->n.width;
135142
_nkmp.min_k = nkmp->k.min ?: 1;
@@ -141,8 +148,12 @@ static long ccu_nkmp_round_rate(struct clk_hw *hw, unsigned long rate,
141148

142149
ccu_nkmp_find_best(*parent_rate, rate, &_nkmp);
143150

144-
return ccu_nkmp_calc_rate(*parent_rate, _nkmp.n, _nkmp.k,
151+
rate = ccu_nkmp_calc_rate(*parent_rate, _nkmp.n, _nkmp.k,
145152
_nkmp.m, _nkmp.p);
153+
if (nkmp->common.features & CCU_FEATURE_FIXED_POSTDIV)
154+
rate = rate / nkmp->fixed_post_div;
155+
156+
return rate;
146157
}
147158

148159
static int ccu_nkmp_set_rate(struct clk_hw *hw, unsigned long rate,
@@ -154,6 +165,9 @@ static int ccu_nkmp_set_rate(struct clk_hw *hw, unsigned long rate,
154165
unsigned long flags;
155166
u32 reg;
156167

168+
if (nkmp->common.features & CCU_FEATURE_FIXED_POSTDIV)
169+
rate = rate * nkmp->fixed_post_div;
170+
157171
_nkmp.min_n = nkmp->n.min ?: 1;
158172
_nkmp.max_n = nkmp->n.max ?: 1 << nkmp->n.width;
159173
_nkmp.min_k = nkmp->k.min ?: 1;

drivers/clk/sunxi-ng/ccu_nkmp.h

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -34,6 +34,8 @@ struct ccu_nkmp {
3434
struct ccu_div_internal m;
3535
struct ccu_div_internal p;
3636

37+
unsigned int fixed_post_div;
38+
3739
struct ccu_common common;
3840
};
3941

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