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dianderslinusw
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pinctrl: qcom: Properly clear "intr_ack_high" interrupts when unmasking
In commit 4b7618f ("pinctrl: qcom: Add irq_enable callback for msm gpio") we tried to Ack interrupts during unmask. However, that patch forgot to check "intr_ack_high" so, presumably, it only worked for a certain subset of SoCs. Let's add a small accessor so we don't need to open-code the logic in both places. This was found by code inspection. I don't have any access to the hardware in question nor software that needs the Ack during unmask. Fixes: 4b7618f ("pinctrl: qcom: Add irq_enable callback for msm gpio") Signed-off-by: Douglas Anderson <[email protected]> Reviewed-by: Maulik Shah <[email protected]> Tested-by: Maulik Shah <[email protected]> Reviewed-by: Stephen Boyd <[email protected]> Reviewed-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/20210114191601.v7.3.I32d0f4e174d45363b49ab611a13c3da8f1e87d0f@changeid Signed-off-by: Linus Walleij <[email protected]>
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drivers/pinctrl/qcom/pinctrl-msm.c

Lines changed: 10 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -96,6 +96,14 @@ MSM_ACCESSOR(intr_cfg)
9696
MSM_ACCESSOR(intr_status)
9797
MSM_ACCESSOR(intr_target)
9898

99+
static void msm_ack_intr_status(struct msm_pinctrl *pctrl,
100+
const struct msm_pingroup *g)
101+
{
102+
u32 val = g->intr_ack_high ? BIT(g->intr_status_bit) : 0;
103+
104+
msm_writel_intr_status(val, pctrl, g);
105+
}
106+
99107
static int msm_get_groups_count(struct pinctrl_dev *pctldev)
100108
{
101109
struct msm_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
@@ -797,7 +805,7 @@ static void msm_gpio_irq_clear_unmask(struct irq_data *d, bool status_clear)
797805
* when the interrupt is not in use.
798806
*/
799807
if (status_clear)
800-
msm_writel_intr_status(0, pctrl, g);
808+
msm_ack_intr_status(pctrl, g);
801809

802810
val = msm_readl_intr_cfg(pctrl, g);
803811
val |= BIT(g->intr_raw_status_bit);
@@ -890,7 +898,6 @@ static void msm_gpio_irq_ack(struct irq_data *d)
890898
struct msm_pinctrl *pctrl = gpiochip_get_data(gc);
891899
const struct msm_pingroup *g;
892900
unsigned long flags;
893-
u32 val;
894901

895902
if (test_bit(d->hwirq, pctrl->skip_wake_irqs)) {
896903
if (test_bit(d->hwirq, pctrl->dual_edge_irqs))
@@ -902,8 +909,7 @@ static void msm_gpio_irq_ack(struct irq_data *d)
902909

903910
raw_spin_lock_irqsave(&pctrl->lock, flags);
904911

905-
val = g->intr_ack_high ? BIT(g->intr_status_bit) : 0;
906-
msm_writel_intr_status(val, pctrl, g);
912+
msm_ack_intr_status(pctrl, g);
907913

908914
if (test_bit(d->hwirq, pctrl->dual_edge_irqs))
909915
msm_gpio_update_dual_edge_pos(pctrl, g, d);

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