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torvaldstorvalds
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Merge tag 'loongarch-fixes-5.19-5' of git://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
Pull LoongArch fixes from Huacai Chen: - Fix cache size calculation, stack protection attributes, ptrace's fpr_set and "ROM Size" in boardinfo - Some cleanups and improvements of assembly - Some cleanups of unused code and useless code * tag 'loongarch-fixes-5.19-5' of git://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson: LoongArch: Fix wrong "ROM Size" of boardinfo LoongArch: Fix missing fcsr in ptrace's fpr_set LoongArch: Fix shared cache size calculation LoongArch: Disable executable stack by default LoongArch: Remove unused variables LoongArch: Remove clock setting during cpu hotplug stage LoongArch: Remove useless header compiler.h LoongArch: Remove several syntactic sugar macros for branches LoongArch: Re-tab the assembly files LoongArch: Simplify "BGT foo, zero" with BGTZ LoongArch: Simplify "BLT foo, zero" with BLTZ LoongArch: Simplify "BEQ/BNE foo, zero" with BEQZ/BNEZ LoongArch: Use the "move" pseudo-instruction where applicable LoongArch: Use the "jr" pseudo-instruction where applicable LoongArch: Use ABI names of registers where appropriate
2 parents 9d928d9 + 45b53c9 commit a95eb1d

31 files changed

+277
-428
lines changed

‎arch/loongarch/Kconfig

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -69,7 +69,6 @@ config LOONGARCH
6969
select GENERIC_TIME_VSYSCALL
7070
select GPIOLIB
7171
select HAVE_ARCH_AUDITSYSCALL
72-
select HAVE_ARCH_COMPILER_H
7372
select HAVE_ARCH_MMAP_RND_BITS if MMU
7473
select HAVE_ARCH_SECCOMP_FILTER
7574
select HAVE_ARCH_TRACEHOOK

‎arch/loongarch/include/asm/asmmacro.h

Lines changed: 0 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -274,16 +274,4 @@
274274
nor \dst, \src, zero
275275
.endm
276276

277-
.macro bgt r0 r1 label
278-
blt \r1, \r0, \label
279-
.endm
280-
281-
.macro bltz r0 label
282-
blt \r0, zero, \label
283-
.endm
284-
285-
.macro bgez r0 label
286-
bge \r0, zero, \label
287-
.endm
288-
289277
#endif /* _ASM_ASMMACRO_H */

‎arch/loongarch/include/asm/atomic.h

Lines changed: 16 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -10,7 +10,6 @@
1010
#include <linux/types.h>
1111
#include <asm/barrier.h>
1212
#include <asm/cmpxchg.h>
13-
#include <asm/compiler.h>
1413

1514
#if __SIZEOF_LONG__ == 4
1615
#define __LL "ll.w "
@@ -157,27 +156,25 @@ static inline int arch_atomic_sub_if_positive(int i, atomic_t *v)
157156
__asm__ __volatile__(
158157
"1: ll.w %1, %2 # atomic_sub_if_positive\n"
159158
" addi.w %0, %1, %3 \n"
160-
" or %1, %0, $zero \n"
161-
" blt %0, $zero, 2f \n"
159+
" move %1, %0 \n"
160+
" bltz %0, 2f \n"
162161
" sc.w %1, %2 \n"
163-
" beq $zero, %1, 1b \n"
162+
" beqz %1, 1b \n"
164163
"2: \n"
165164
__WEAK_LLSC_MB
166-
: "=&r" (result), "=&r" (temp),
167-
"+" GCC_OFF_SMALL_ASM() (v->counter)
165+
: "=&r" (result), "=&r" (temp), "+ZC" (v->counter)
168166
: "I" (-i));
169167
} else {
170168
__asm__ __volatile__(
171169
"1: ll.w %1, %2 # atomic_sub_if_positive\n"
172170
" sub.w %0, %1, %3 \n"
173-
" or %1, %0, $zero \n"
174-
" blt %0, $zero, 2f \n"
171+
" move %1, %0 \n"
172+
" bltz %0, 2f \n"
175173
" sc.w %1, %2 \n"
176-
" beq $zero, %1, 1b \n"
174+
" beqz %1, 1b \n"
177175
"2: \n"
178176
__WEAK_LLSC_MB
179-
: "=&r" (result), "=&r" (temp),
180-
"+" GCC_OFF_SMALL_ASM() (v->counter)
177+
: "=&r" (result), "=&r" (temp), "+ZC" (v->counter)
181178
: "r" (i));
182179
}
183180

@@ -320,27 +317,25 @@ static inline long arch_atomic64_sub_if_positive(long i, atomic64_t *v)
320317
__asm__ __volatile__(
321318
"1: ll.d %1, %2 # atomic64_sub_if_positive \n"
322319
" addi.d %0, %1, %3 \n"
323-
" or %1, %0, $zero \n"
324-
" blt %0, $zero, 2f \n"
320+
" move %1, %0 \n"
321+
" bltz %0, 2f \n"
325322
" sc.d %1, %2 \n"
326-
" beq %1, $zero, 1b \n"
323+
" beqz %1, 1b \n"
327324
"2: \n"
328325
__WEAK_LLSC_MB
329-
: "=&r" (result), "=&r" (temp),
330-
"+" GCC_OFF_SMALL_ASM() (v->counter)
326+
: "=&r" (result), "=&r" (temp), "+ZC" (v->counter)
331327
: "I" (-i));
332328
} else {
333329
__asm__ __volatile__(
334330
"1: ll.d %1, %2 # atomic64_sub_if_positive \n"
335331
" sub.d %0, %1, %3 \n"
336-
" or %1, %0, $zero \n"
337-
" blt %0, $zero, 2f \n"
332+
" move %1, %0 \n"
333+
" bltz %0, 2f \n"
338334
" sc.d %1, %2 \n"
339-
" beq %1, $zero, 1b \n"
335+
" beqz %1, 1b \n"
340336
"2: \n"
341337
__WEAK_LLSC_MB
342-
: "=&r" (result), "=&r" (temp),
343-
"+" GCC_OFF_SMALL_ASM() (v->counter)
338+
: "=&r" (result), "=&r" (temp), "+ZC" (v->counter)
344339
: "r" (i));
345340
}
346341

‎arch/loongarch/include/asm/barrier.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -48,9 +48,9 @@ static inline unsigned long array_index_mask_nospec(unsigned long index,
4848
__asm__ __volatile__(
4949
"sltu %0, %1, %2\n\t"
5050
#if (__SIZEOF_LONG__ == 4)
51-
"sub.w %0, $r0, %0\n\t"
51+
"sub.w %0, $zero, %0\n\t"
5252
#elif (__SIZEOF_LONG__ == 8)
53-
"sub.d %0, $r0, %0\n\t"
53+
"sub.d %0, $zero, %0\n\t"
5454
#endif
5555
: "=r" (mask)
5656
: "r" (index), "r" (size)

‎arch/loongarch/include/asm/cmpxchg.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -55,9 +55,9 @@ static inline unsigned long __xchg(volatile void *ptr, unsigned long x,
5555
__asm__ __volatile__( \
5656
"1: " ld " %0, %2 # __cmpxchg_asm \n" \
5757
" bne %0, %z3, 2f \n" \
58-
" or $t0, %z4, $zero \n" \
58+
" move $t0, %z4 \n" \
5959
" " st " $t0, %1 \n" \
60-
" beq $zero, $t0, 1b \n" \
60+
" beqz $t0, 1b \n" \
6161
"2: \n" \
6262
__WEAK_LLSC_MB \
6363
: "=&r" (__ret), "=ZB"(*m) \

‎arch/loongarch/include/asm/compiler.h

Lines changed: 0 additions & 15 deletions
This file was deleted.

‎arch/loongarch/include/asm/elf.h

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -288,8 +288,6 @@ struct arch_elf_state {
288288
.interp_fp_abi = LOONGARCH_ABI_FP_ANY, \
289289
}
290290

291-
#define elf_read_implies_exec(ex, exec_stk) (exec_stk == EXSTACK_DEFAULT)
292-
293291
extern int arch_elf_pt_proc(void *ehdr, void *phdr, struct file *elf,
294292
bool is_interp, struct arch_elf_state *state);
295293

‎arch/loongarch/include/asm/futex.h

Lines changed: 5 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -8,7 +8,6 @@
88
#include <linux/futex.h>
99
#include <linux/uaccess.h>
1010
#include <asm/barrier.h>
11-
#include <asm/compiler.h>
1211
#include <asm/errno.h>
1312

1413
#define __futex_atomic_op(insn, ret, oldval, uaddr, oparg) \
@@ -17,7 +16,7 @@
1716
"1: ll.w %1, %4 # __futex_atomic_op\n" \
1817
" " insn " \n" \
1918
"2: sc.w $t0, %2 \n" \
20-
" beq $t0, $zero, 1b \n" \
19+
" beqz $t0, 1b \n" \
2120
"3: \n" \
2221
" .section .fixup,\"ax\" \n" \
2322
"4: li.w %0, %6 \n" \
@@ -82,9 +81,9 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr, u32 oldval, u32 newv
8281
"# futex_atomic_cmpxchg_inatomic \n"
8382
"1: ll.w %1, %3 \n"
8483
" bne %1, %z4, 3f \n"
85-
" or $t0, %z5, $zero \n"
84+
" move $t0, %z5 \n"
8685
"2: sc.w $t0, %2 \n"
87-
" beq $zero, $t0, 1b \n"
86+
" beqz $t0, 1b \n"
8887
"3: \n"
8988
__WEAK_LLSC_MB
9089
" .section .fixup,\"ax\" \n"
@@ -95,8 +94,8 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr, u32 oldval, u32 newv
9594
" "__UA_ADDR "\t1b, 4b \n"
9695
" "__UA_ADDR "\t2b, 4b \n"
9796
" .previous \n"
98-
: "+r" (ret), "=&r" (val), "=" GCC_OFF_SMALL_ASM() (*uaddr)
99-
: GCC_OFF_SMALL_ASM() (*uaddr), "Jr" (oldval), "Jr" (newval),
97+
: "+r" (ret), "=&r" (val), "=ZC" (*uaddr)
98+
: "ZC" (*uaddr), "Jr" (oldval), "Jr" (newval),
10099
"i" (-EFAULT)
101100
: "memory", "t0");
102101

‎arch/loongarch/include/asm/irqflags.h

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -9,7 +9,6 @@
99

1010
#include <linux/compiler.h>
1111
#include <linux/stringify.h>
12-
#include <asm/compiler.h>
1312
#include <asm/loongarch.h>
1413

1514
static inline void arch_local_irq_enable(void)

‎arch/loongarch/include/asm/local.h

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -9,7 +9,6 @@
99
#include <linux/bitops.h>
1010
#include <linux/atomic.h>
1111
#include <asm/cmpxchg.h>
12-
#include <asm/compiler.h>
1312

1413
typedef struct {
1514
atomic_long_t a;

‎arch/loongarch/include/asm/loongson.h

Lines changed: 2 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -39,26 +39,14 @@ extern const struct plat_smp_ops loongson3_smp_ops;
3939

4040
#define MAX_PACKAGES 16
4141

42-
/* Chip Config register of each physical cpu package */
43-
extern u64 loongson_chipcfg[MAX_PACKAGES];
44-
#define LOONGSON_CHIPCFG(id) (*(volatile u32 *)(loongson_chipcfg[id]))
45-
46-
/* Chip Temperature register of each physical cpu package */
47-
extern u64 loongson_chiptemp[MAX_PACKAGES];
48-
#define LOONGSON_CHIPTEMP(id) (*(volatile u32 *)(loongson_chiptemp[id]))
49-
50-
/* Freq Control register of each physical cpu package */
51-
extern u64 loongson_freqctrl[MAX_PACKAGES];
52-
#define LOONGSON_FREQCTRL(id) (*(volatile u32 *)(loongson_freqctrl[id]))
53-
5442
#define xconf_readl(addr) readl(addr)
5543
#define xconf_readq(addr) readq(addr)
5644

5745
static inline void xconf_writel(u32 val, volatile void __iomem *addr)
5846
{
5947
asm volatile (
6048
" st.w %[v], %[hw], 0 \n"
61-
" ld.b $r0, %[hw], 0 \n"
49+
" ld.b $zero, %[hw], 0 \n"
6250
:
6351
: [hw] "r" (addr), [v] "r" (val)
6452
);
@@ -68,7 +56,7 @@ static inline void xconf_writeq(u64 val64, volatile void __iomem *addr)
6856
{
6957
asm volatile (
7058
" st.d %[v], %[hw], 0 \n"
71-
" ld.b $r0, %[hw], 0 \n"
59+
" ld.b $zero, %[hw], 0 \n"
7260
:
7361
: [hw] "r" (addr), [v] "r" (val64)
7462
);

‎arch/loongarch/include/asm/stacktrace.h

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -23,13 +23,13 @@
2323
static __always_inline void prepare_frametrace(struct pt_regs *regs)
2424
{
2525
__asm__ __volatile__(
26-
/* Save $r1 */
26+
/* Save $ra */
2727
STORE_ONE_REG(1)
28-
/* Use $r1 to save PC */
29-
"pcaddi $r1, 0\n\t"
30-
STR_LONG_S " $r1, %0\n\t"
31-
/* Restore $r1 */
32-
STR_LONG_L " $r1, %1, "STR_LONGSIZE"\n\t"
28+
/* Use $ra to save PC */
29+
"pcaddi $ra, 0\n\t"
30+
STR_LONG_S " $ra, %0\n\t"
31+
/* Restore $ra */
32+
STR_LONG_L " $ra, %1, "STR_LONGSIZE"\n\t"
3333
STORE_ONE_REG(2)
3434
STORE_ONE_REG(3)
3535
STORE_ONE_REG(4)

‎arch/loongarch/include/asm/thread_info.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -44,14 +44,14 @@ struct thread_info {
4444
}
4545

4646
/* How to get the thread information struct from C. */
47-
register struct thread_info *__current_thread_info __asm__("$r2");
47+
register struct thread_info *__current_thread_info __asm__("$tp");
4848

4949
static inline struct thread_info *current_thread_info(void)
5050
{
5151
return __current_thread_info;
5252
}
5353

54-
register unsigned long current_stack_pointer __asm__("$r3");
54+
register unsigned long current_stack_pointer __asm__("$sp");
5555

5656
#endif /* !__ASSEMBLY__ */
5757

‎arch/loongarch/include/asm/uaccess.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -162,7 +162,7 @@ do { \
162162
"2: \n" \
163163
" .section .fixup,\"ax\" \n" \
164164
"3: li.w %0, %3 \n" \
165-
" or %1, $r0, $r0 \n" \
165+
" move %1, $zero \n" \
166166
" b 2b \n" \
167167
" .previous \n" \
168168
" .section __ex_table,\"a\" \n" \

‎arch/loongarch/kernel/cacheinfo.c

Lines changed: 9 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -4,8 +4,9 @@
44
*
55
* Copyright (C) 2020-2022 Loongson Technology Corporation Limited
66
*/
7-
#include <asm/cpu-info.h>
87
#include <linux/cacheinfo.h>
8+
#include <asm/bootinfo.h>
9+
#include <asm/cpu-info.h>
910

1011
/* Populates leaf and increments to next leaf */
1112
#define populate_cache(cache, leaf, c_level, c_type) \
@@ -17,6 +18,8 @@ do { \
1718
leaf->ways_of_associativity = c->cache.ways; \
1819
leaf->size = c->cache.linesz * c->cache.sets * \
1920
c->cache.ways; \
21+
if (leaf->level > 2) \
22+
leaf->size *= nodes_per_package; \
2023
leaf++; \
2124
} while (0)
2225

@@ -95,11 +98,15 @@ static void cache_cpumap_setup(unsigned int cpu)
9598

9699
int populate_cache_leaves(unsigned int cpu)
97100
{
98-
int level = 1;
101+
int level = 1, nodes_per_package = 1;
99102
struct cpuinfo_loongarch *c = &current_cpu_data;
100103
struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
101104
struct cacheinfo *this_leaf = this_cpu_ci->info_list;
102105

106+
if (loongson_sysconf.nr_nodes > 1)
107+
nodes_per_package = loongson_sysconf.cores_per_package
108+
/ loongson_sysconf.cores_per_node;
109+
103110
if (c->icache.waysize) {
104111
populate_cache(dcache, this_leaf, level, CACHE_TYPE_DATA);
105112
populate_cache(icache, this_leaf, level++, CACHE_TYPE_INST);

‎arch/loongarch/kernel/entry.S

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -27,7 +27,7 @@ SYM_FUNC_START(handle_syscall)
2727

2828
addi.d sp, sp, -PT_SIZE
2929
cfi_st t2, PT_R3
30-
cfi_rel_offset sp, PT_R3
30+
cfi_rel_offset sp, PT_R3
3131
st.d zero, sp, PT_R0
3232
csrrd t2, LOONGARCH_CSR_PRMD
3333
st.d t2, sp, PT_PRMD
@@ -50,7 +50,7 @@ SYM_FUNC_START(handle_syscall)
5050
cfi_st a7, PT_R11
5151
csrrd ra, LOONGARCH_CSR_ERA
5252
st.d ra, sp, PT_ERA
53-
cfi_rel_offset ra, PT_ERA
53+
cfi_rel_offset ra, PT_ERA
5454

5555
cfi_st tp, PT_R2
5656
cfi_st u0, PT_R21

‎arch/loongarch/kernel/env.c

Lines changed: 0 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -17,21 +17,6 @@ u64 efi_system_table;
1717
struct loongson_system_configuration loongson_sysconf;
1818
EXPORT_SYMBOL(loongson_sysconf);
1919

20-
u64 loongson_chipcfg[MAX_PACKAGES];
21-
u64 loongson_chiptemp[MAX_PACKAGES];
22-
u64 loongson_freqctrl[MAX_PACKAGES];
23-
unsigned long long smp_group[MAX_PACKAGES];
24-
25-
static void __init register_addrs_set(u64 *registers, const u64 addr, int num)
26-
{
27-
u64 i;
28-
29-
for (i = 0; i < num; i++) {
30-
*registers = (i << 44) | addr;
31-
registers++;
32-
}
33-
}
34-
3520
void __init init_environ(void)
3621
{
3722
int efi_boot = fw_arg0;
@@ -50,11 +35,6 @@ void __init init_environ(void)
5035
efi_memmap_init_early(&data);
5136
memblock_reserve(data.phys_map & PAGE_MASK,
5237
PAGE_ALIGN(data.size + (data.phys_map & ~PAGE_MASK)));
53-
54-
register_addrs_set(smp_group, TO_UNCACHE(0x1fe01000), 16);
55-
register_addrs_set(loongson_chipcfg, TO_UNCACHE(0x1fe00180), 16);
56-
register_addrs_set(loongson_chiptemp, TO_UNCACHE(0x1fe0019c), 16);
57-
register_addrs_set(loongson_freqctrl, TO_UNCACHE(0x1fe001d0), 16);
5838
}
5939

6040
static int __init init_cpu_fullname(void)

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