Skip to content

Commit aa49d62

Browse files
r-vigneshthierryreding
authored andcommitted
pwm: tiehrpwm: Don't use emulation mode bits to control PWM output
As per AM335x TRM SPRUH73P "15.2.2.11 ePWM Behavior During Emulation", TBCTL[15:14] only have effect during emulation suspend events (IOW, to stop PWM when debugging using a debugger). These bits have no effect on PWM output during normal running of system. Hence, remove code accessing these bits as they have no role in enabling/disabling PWMs. Fixes: 19891b2 ("pwm: pwm-tiehrpwm: PWM driver support for EHRPWM") Cc: [email protected] Signed-off-by: Vignesh R <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
1 parent 4de445c commit aa49d62

File tree

1 file changed

+1
-11
lines changed

1 file changed

+1
-11
lines changed

drivers/pwm/pwm-tiehrpwm.c

Lines changed: 1 addition & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -33,10 +33,6 @@
3333
#define TBCTL 0x00
3434
#define TBPRD 0x0A
3535

36-
#define TBCTL_RUN_MASK (BIT(15) | BIT(14))
37-
#define TBCTL_STOP_NEXT 0
38-
#define TBCTL_STOP_ON_CYCLE BIT(14)
39-
#define TBCTL_FREE_RUN (BIT(15) | BIT(14))
4036
#define TBCTL_PRDLD_MASK BIT(3)
4137
#define TBCTL_PRDLD_SHDW 0
4238
#define TBCTL_PRDLD_IMDT BIT(3)
@@ -360,17 +356,14 @@ static int ehrpwm_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
360356
/* Channels polarity can be configured from action qualifier module */
361357
configure_polarity(pc, pwm->hwpwm);
362358

363-
/* Enable TBCLK before enabling PWM device */
359+
/* Enable TBCLK */
364360
ret = clk_enable(pc->tbclk);
365361
if (ret) {
366362
dev_err(chip->dev, "Failed to enable TBCLK for %s: %d\n",
367363
dev_name(pc->chip.dev), ret);
368364
return ret;
369365
}
370366

371-
/* Enable time counter for free_run */
372-
ehrpwm_modify(pc->mmio_base, TBCTL, TBCTL_RUN_MASK, TBCTL_FREE_RUN);
373-
374367
return 0;
375368
}
376369

@@ -400,9 +393,6 @@ static void ehrpwm_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
400393
/* Disabling TBCLK on PWM disable */
401394
clk_disable(pc->tbclk);
402395

403-
/* Stop Time base counter */
404-
ehrpwm_modify(pc->mmio_base, TBCTL, TBCTL_RUN_MASK, TBCTL_STOP_NEXT);
405-
406396
/* Disable clock on PWM disable */
407397
pm_runtime_put_sync(chip->dev);
408398
}

0 commit comments

Comments
 (0)