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Add cs42l43 PC focused SoundWire CODEC
Merge series from Charles Keepax <[email protected]>: This patch chain adds support for the Cirrus Logic cs42l43 PC focused SoundWire CODEC.
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‎Documentation/ABI/testing/sysfs-bus-cxl

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@@ -82,7 +82,12 @@ Description:
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whether it resides in persistent capacity, volatile capacity,
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or the LSA, is made permanently unavailable by whatever means
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is appropriate for the media type. This functionality requires
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the device to be not be actively decoding any HPA ranges.
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the device to be disabled, that is, not actively decoding any
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HPA ranges. This permits avoiding explicit global CPU cache
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management, relying instead for it to be done when a region
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transitions between software programmed and hardware committed
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states. If this file is not present, then there is no hardware
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support for the operation.
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What /sys/bus/cxl/devices/memX/security/erase
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Description:
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(WO) Write a boolean 'true' string value to this attribute to
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secure erase user data by changing the media encryption keys for
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all user data areas of the device.
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all user data areas of the device. This functionality requires
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the device to be disabled, that is, not actively decoding any
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HPA ranges. This permits avoiding explicit global CPU cache
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management, relying instead for it to be done when a region
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transitions between software programmed and hardware committed
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states. If this file is not present, then there is no hardware
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support for the operation.
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What: /sys/bus/cxl/devices/memX/firmware/

‎Documentation/ABI/testing/sysfs-devices-system-cpu

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@@ -513,17 +513,18 @@ Description: information about CPUs heterogeneity.
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cpu_capacity: capacity of cpuX.
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What: /sys/devices/system/cpu/vulnerabilities
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/sys/devices/system/cpu/vulnerabilities/gather_data_sampling
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/sys/devices/system/cpu/vulnerabilities/itlb_multihit
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/sys/devices/system/cpu/vulnerabilities/l1tf
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/sys/devices/system/cpu/vulnerabilities/mds
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/sys/devices/system/cpu/vulnerabilities/meltdown
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/sys/devices/system/cpu/vulnerabilities/mmio_stale_data
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/sys/devices/system/cpu/vulnerabilities/retbleed
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/sys/devices/system/cpu/vulnerabilities/spec_store_bypass
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/sys/devices/system/cpu/vulnerabilities/spectre_v1
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/sys/devices/system/cpu/vulnerabilities/spectre_v2
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/sys/devices/system/cpu/vulnerabilities/spec_store_bypass
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/sys/devices/system/cpu/vulnerabilities/l1tf
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/sys/devices/system/cpu/vulnerabilities/mds
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/sys/devices/system/cpu/vulnerabilities/srbds
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/sys/devices/system/cpu/vulnerabilities/tsx_async_abort
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/sys/devices/system/cpu/vulnerabilities/itlb_multihit
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/sys/devices/system/cpu/vulnerabilities/mmio_stale_data
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/sys/devices/system/cpu/vulnerabilities/retbleed
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Date: January 2018
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Contact: Linux kernel mailing list <[email protected]>
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Description: Information about CPU vulnerabilities

‎Documentation/ABI/testing/sysfs-platform-hidma

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@@ -2,7 +2,7 @@ What: /sys/devices/platform/hidma-*/chid
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/sys/devices/platform/QCOM8061:*/chid
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Date: Dec 2015
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KernelVersion: 4.4
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Contact: "Sinan Kaya <okaya@codeaurora.org>"
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Contact: "Sinan Kaya <okaya@kernel.org>"
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Description:
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Contains the ID of the channel within the HIDMA instance.
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It is used to associate a given HIDMA channel with the

‎Documentation/ABI/testing/sysfs-platform-hidma-mgmt

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@@ -2,7 +2,7 @@ What: /sys/devices/platform/hidma-mgmt*/chanops/chan*/priority
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/sys/devices/platform/QCOM8060:*/chanops/chan*/priority
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Date: Nov 2015
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KernelVersion: 4.4
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Contact: "Sinan Kaya <okaya@codeaurora.org>"
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Contact: "Sinan Kaya <okaya@kernel.org>"
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Description:
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Contains either 0 or 1 and indicates if the DMA channel is a
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low priority (0) or high priority (1) channel.
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/sys/devices/platform/QCOM8060:*/chanops/chan*/weight
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Date: Nov 2015
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KernelVersion: 4.4
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Contact: "Sinan Kaya <okaya@codeaurora.org>"
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Contact: "Sinan Kaya <okaya@kernel.org>"
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Description:
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Contains 0..15 and indicates the weight of the channel among
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equal priority channels during round robin scheduling.
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/sys/devices/platform/QCOM8060:*/chreset_timeout_cycles
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Date: Nov 2015
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KernelVersion: 4.4
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Contact: "Sinan Kaya <okaya@codeaurora.org>"
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Contact: "Sinan Kaya <okaya@kernel.org>"
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Description:
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Contains the platform specific cycle value to wait after a
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reset command is issued. If the value is chosen too short,
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/sys/devices/platform/QCOM8060:*/dma_channels
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Date: Nov 2015
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KernelVersion: 4.4
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Contact: "Sinan Kaya <okaya@codeaurora.org>"
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Contact: "Sinan Kaya <okaya@kernel.org>"
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Description:
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Contains the number of dma channels supported by one instance
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of HIDMA hardware. The value may change from chip to chip.
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/sys/devices/platform/QCOM8060:*/hw_version_major
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Date: Nov 2015
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KernelVersion: 4.4
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Contact: "Sinan Kaya <okaya@codeaurora.org>"
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Contact: "Sinan Kaya <okaya@kernel.org>"
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Description:
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Version number major for the hardware.
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What: /sys/devices/platform/hidma-mgmt*/hw_version_minor
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/sys/devices/platform/QCOM8060:*/hw_version_minor
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Date: Nov 2015
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KernelVersion: 4.4
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Contact: "Sinan Kaya <okaya@codeaurora.org>"
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Contact: "Sinan Kaya <okaya@kernel.org>"
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Description:
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Version number minor for the hardware.
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What: /sys/devices/platform/hidma-mgmt*/max_rd_xactions
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/sys/devices/platform/QCOM8060:*/max_rd_xactions
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Date: Nov 2015
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KernelVersion: 4.4
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Contact: "Sinan Kaya <okaya@codeaurora.org>"
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Contact: "Sinan Kaya <okaya@kernel.org>"
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Description:
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Contains a value between 0 and 31. Maximum number of
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read transactions that can be issued back to back.
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/sys/devices/platform/QCOM8060:*/max_read_request
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Date: Nov 2015
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KernelVersion: 4.4
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Contact: "Sinan Kaya <okaya@codeaurora.org>"
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Contact: "Sinan Kaya <okaya@kernel.org>"
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Description:
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Size of each read request. The value needs to be a power
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of two and can be between 128 and 1024.
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/sys/devices/platform/QCOM8060:*/max_wr_xactions
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Date: Nov 2015
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KernelVersion: 4.4
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Contact: "Sinan Kaya <okaya@codeaurora.org>"
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Contact: "Sinan Kaya <okaya@kernel.org>"
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Description:
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Contains a value between 0 and 31. Maximum number of
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write transactions that can be issued back to back.
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/sys/devices/platform/QCOM8060:*/max_write_request
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Date: Nov 2015
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KernelVersion: 4.4
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Contact: "Sinan Kaya <okaya@codeaurora.org>"
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Contact: "Sinan Kaya <okaya@kernel.org>"
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Description:
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Size of each write request. The value needs to be a power
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of two and can be between 128 and 1024.

‎Documentation/admin-guide/hw-vuln/gather_data_sampling.rst

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.. SPDX-License-Identifier: GPL-2.0
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GDS - Gather Data Sampling
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==========================
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Gather Data Sampling is a hardware vulnerability which allows unprivileged
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speculative access to data which was previously stored in vector registers.
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Problem
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-------
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When a gather instruction performs loads from memory, different data elements
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are merged into the destination vector register. However, when a gather
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instruction that is transiently executed encounters a fault, stale data from
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architectural or internal vector registers may get transiently forwarded to the
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destination vector register instead. This will allow a malicious attacker to
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infer stale data using typical side channel techniques like cache timing
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attacks. GDS is a purely sampling-based attack.
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The attacker uses gather instructions to infer the stale vector register data.
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The victim does not need to do anything special other than use the vector
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registers. The victim does not need to use gather instructions to be
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vulnerable.
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Because the buffers are shared between Hyper-Threads cross Hyper-Thread attacks
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are possible.
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Attack scenarios
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----------------
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Without mitigation, GDS can infer stale data across virtually all
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permission boundaries:
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Non-enclaves can infer SGX enclave data
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Userspace can infer kernel data
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Guests can infer data from hosts
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Guest can infer guest from other guests
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Users can infer data from other users
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Because of this, it is important to ensure that the mitigation stays enabled in
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lower-privilege contexts like guests and when running outside SGX enclaves.
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The hardware enforces the mitigation for SGX. Likewise, VMMs should ensure
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that guests are not allowed to disable the GDS mitigation. If a host erred and
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allowed this, a guest could theoretically disable GDS mitigation, mount an
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attack, and re-enable it.
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Mitigation mechanism
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--------------------
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This issue is mitigated in microcode. The microcode defines the following new
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bits:
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================================ === ============================
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IA32_ARCH_CAPABILITIES[GDS_CTRL] R/O Enumerates GDS vulnerability
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and mitigation support.
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IA32_ARCH_CAPABILITIES[GDS_NO] R/O Processor is not vulnerable.
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IA32_MCU_OPT_CTRL[GDS_MITG_DIS] R/W Disables the mitigation
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0 by default.
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IA32_MCU_OPT_CTRL[GDS_MITG_LOCK] R/W Locks GDS_MITG_DIS=0. Writes
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to GDS_MITG_DIS are ignored
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Can't be cleared once set.
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================================ === ============================
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GDS can also be mitigated on systems that don't have updated microcode by
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disabling AVX. This can be done by setting gather_data_sampling="force" or
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"clearcpuid=avx" on the kernel command-line.
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If used, these options will disable AVX use by turning off XSAVE YMM support.
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However, the processor will still enumerate AVX support. Userspace that
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does not follow proper AVX enumeration to check both AVX *and* XSAVE YMM
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support will break.
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Mitigation control on the kernel command line
72+
---------------------------------------------
73+
The mitigation can be disabled by setting "gather_data_sampling=off" or
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"mitigations=off" on the kernel command line. Not specifying either will default
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to the mitigation being enabled. Specifying "gather_data_sampling=force" will
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use the microcode mitigation when available or disable AVX on affected systems
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where the microcode hasn't been updated to include the mitigation.
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GDS System Information
80+
------------------------
81+
The kernel provides vulnerability status information through sysfs. For
82+
GDS this can be accessed by the following sysfs file:
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/sys/devices/system/cpu/vulnerabilities/gather_data_sampling
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The possible values contained in this file are:
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============================== =============================================
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Not affected Processor not vulnerable.
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Vulnerable Processor vulnerable and mitigation disabled.
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Vulnerable: No microcode Processor vulnerable and microcode is missing
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mitigation.
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Mitigation: AVX disabled,
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no microcode Processor is vulnerable and microcode is missing
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mitigation. AVX disabled as mitigation.
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Mitigation: Microcode Processor is vulnerable and mitigation is in
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effect.
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Mitigation: Microcode (locked) Processor is vulnerable and mitigation is in
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effect and cannot be disabled.
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Unknown: Dependent on
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hypervisor status Running on a virtual guest processor that is
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affected but with no way to know if host
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processor is mitigated or vulnerable.
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============================== =============================================
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GDS Default mitigation
107+
----------------------
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The updated microcode will enable the mitigation by default. The kernel's
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default action is to leave the mitigation enabled.

‎Documentation/admin-guide/hw-vuln/index.rst

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@@ -13,9 +13,11 @@ are configurable at compile, boot or run time.
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l1tf
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mds
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tsx_async_abort
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multihit.rst
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special-register-buffer-data-sampling.rst
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core-scheduling.rst
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l1d_flush.rst
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processor_mmio_stale_data.rst
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cross-thread-rsb.rst
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multihit
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special-register-buffer-data-sampling
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core-scheduling
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l1d_flush
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processor_mmio_stale_data
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cross-thread-rsb
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srso
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gather_data_sampling

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