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drm/i915: Wrap engine->context_pin() and engine->context_unpin()
Make life easier in upcoming patches by moving the context_pin and context_unpin vfuncs into inline helpers. v2: Fixup mock_engine to mark the context as pinned on use. Signed-off-by: Chris Wilson <[email protected]> Reviewed-by: Tvrtko Ursulin <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
1 parent 52d7f16 commit ab82a06

16 files changed

+117
-69
lines changed

‎drivers/gpu/drm/i915/gvt/mmio_context.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -448,7 +448,7 @@ static void switch_mocs(struct intel_vgpu *pre, struct intel_vgpu *next,
448448

449449
bool is_inhibit_context(struct i915_gem_context *ctx, int ring_id)
450450
{
451-
u32 *reg_state = ctx->engine[ring_id].lrc_reg_state;
451+
u32 *reg_state = ctx->__engine[ring_id].lrc_reg_state;
452452
u32 inhibit_mask =
453453
_MASKED_BIT_ENABLE(CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT);
454454

‎drivers/gpu/drm/i915/gvt/scheduler.c

Lines changed: 10 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -58,7 +58,7 @@ static void update_shadow_pdps(struct intel_vgpu_workload *workload)
5858
int ring_id = workload->ring_id;
5959
struct i915_gem_context *shadow_ctx = vgpu->submission.shadow_ctx;
6060
struct drm_i915_gem_object *ctx_obj =
61-
shadow_ctx->engine[ring_id].state->obj;
61+
shadow_ctx->__engine[ring_id].state->obj;
6262
struct execlist_ring_context *shadow_ring_context;
6363
struct page *page;
6464

@@ -130,7 +130,7 @@ static int populate_shadow_context(struct intel_vgpu_workload *workload)
130130
int ring_id = workload->ring_id;
131131
struct i915_gem_context *shadow_ctx = vgpu->submission.shadow_ctx;
132132
struct drm_i915_gem_object *ctx_obj =
133-
shadow_ctx->engine[ring_id].state->obj;
133+
shadow_ctx->__engine[ring_id].state->obj;
134134
struct execlist_ring_context *shadow_ring_context;
135135
struct page *page;
136136
void *dst;
@@ -283,7 +283,7 @@ static int shadow_context_status_change(struct notifier_block *nb,
283283
static void shadow_context_descriptor_update(struct i915_gem_context *ctx,
284284
struct intel_engine_cs *engine)
285285
{
286-
struct intel_context *ce = &ctx->engine[engine->id];
286+
struct intel_context *ce = to_intel_context(ctx, engine);
287287
u64 desc = 0;
288288

289289
desc = ce->lrc_desc;
@@ -389,7 +389,7 @@ int intel_gvt_scan_and_shadow_workload(struct intel_vgpu_workload *workload)
389389
* shadow_ctx pages invalid. So gvt need to pin itself. After update
390390
* the guest context, gvt can unpin the shadow_ctx safely.
391391
*/
392-
ring = engine->context_pin(engine, shadow_ctx);
392+
ring = intel_context_pin(shadow_ctx, engine);
393393
if (IS_ERR(ring)) {
394394
ret = PTR_ERR(ring);
395395
gvt_vgpu_err("fail to pin shadow context\n");
@@ -403,7 +403,7 @@ int intel_gvt_scan_and_shadow_workload(struct intel_vgpu_workload *workload)
403403
return 0;
404404

405405
err_unpin:
406-
engine->context_unpin(engine, shadow_ctx);
406+
intel_context_unpin(shadow_ctx, engine);
407407
err_shadow:
408408
release_shadow_wa_ctx(&workload->wa_ctx);
409409
err_scan:
@@ -437,7 +437,7 @@ static int intel_gvt_generate_request(struct intel_vgpu_workload *workload)
437437
return 0;
438438

439439
err_unpin:
440-
engine->context_unpin(engine, shadow_ctx);
440+
intel_context_unpin(shadow_ctx, engine);
441441
release_shadow_wa_ctx(&workload->wa_ctx);
442442
return ret;
443443
}
@@ -526,7 +526,7 @@ static int update_wa_ctx_2_shadow_ctx(struct intel_shadow_wa_ctx *wa_ctx)
526526
struct intel_vgpu_submission *s = &workload->vgpu->submission;
527527
struct i915_gem_context *shadow_ctx = s->shadow_ctx;
528528
struct drm_i915_gem_object *ctx_obj =
529-
shadow_ctx->engine[ring_id].state->obj;
529+
shadow_ctx->__engine[ring_id].state->obj;
530530
struct execlist_ring_context *shadow_ring_context;
531531
struct page *page;
532532

@@ -688,7 +688,7 @@ static int dispatch_workload(struct intel_vgpu_workload *workload)
688688

689689
ret = prepare_workload(workload);
690690
if (ret) {
691-
engine->context_unpin(engine, shadow_ctx);
691+
intel_context_unpin(shadow_ctx, engine);
692692
goto out;
693693
}
694694

@@ -771,7 +771,7 @@ static void update_guest_context(struct intel_vgpu_workload *workload)
771771
struct i915_gem_context *shadow_ctx = s->shadow_ctx;
772772
int ring_id = workload->ring_id;
773773
struct drm_i915_gem_object *ctx_obj =
774-
shadow_ctx->engine[ring_id].state->obj;
774+
shadow_ctx->__engine[ring_id].state->obj;
775775
struct execlist_ring_context *shadow_ring_context;
776776
struct page *page;
777777
void *src;
@@ -898,7 +898,7 @@ static void complete_current_workload(struct intel_gvt *gvt, int ring_id)
898898
}
899899
mutex_lock(&dev_priv->drm.struct_mutex);
900900
/* unpin shadow ctx as the shadow_ctx update is done */
901-
engine->context_unpin(engine, s->shadow_ctx);
901+
intel_context_unpin(s->shadow_ctx, engine);
902902
mutex_unlock(&dev_priv->drm.struct_mutex);
903903
}
904904

‎drivers/gpu/drm/i915/i915_debugfs.c

Lines changed: 12 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -377,16 +377,19 @@ static void print_batch_pool_stats(struct seq_file *m,
377377
print_file_stats(m, "[k]batch pool", stats);
378378
}
379379

380-
static int per_file_ctx_stats(int id, void *ptr, void *data)
380+
static int per_file_ctx_stats(int idx, void *ptr, void *data)
381381
{
382382
struct i915_gem_context *ctx = ptr;
383-
int n;
383+
struct intel_engine_cs *engine;
384+
enum intel_engine_id id;
385+
386+
for_each_engine(engine, ctx->i915, id) {
387+
struct intel_context *ce = to_intel_context(ctx, engine);
384388

385-
for (n = 0; n < ARRAY_SIZE(ctx->engine); n++) {
386-
if (ctx->engine[n].state)
387-
per_file_stats(0, ctx->engine[n].state->obj, data);
388-
if (ctx->engine[n].ring)
389-
per_file_stats(0, ctx->engine[n].ring->vma->obj, data);
389+
if (ce->state)
390+
per_file_stats(0, ce->state->obj, data);
391+
if (ce->ring)
392+
per_file_stats(0, ce->ring->vma->obj, data);
390393
}
391394

392395
return 0;
@@ -1959,7 +1962,8 @@ static int i915_context_status(struct seq_file *m, void *unused)
19591962
seq_putc(m, '\n');
19601963

19611964
for_each_engine(engine, dev_priv, id) {
1962-
struct intel_context *ce = &ctx->engine[engine->id];
1965+
struct intel_context *ce =
1966+
to_intel_context(ctx, engine);
19631967

19641968
seq_printf(m, "%s: ", engine->name);
19651969
if (ce->state)

‎drivers/gpu/drm/i915/i915_gem.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -3234,7 +3234,7 @@ void i915_gem_reset(struct drm_i915_private *dev_priv,
32343234
stalled_mask & ENGINE_MASK(id));
32353235
ctx = fetch_and_zero(&engine->last_retired_context);
32363236
if (ctx)
3237-
engine->context_unpin(engine, ctx);
3237+
intel_context_unpin(ctx, engine);
32383238

32393239
/*
32403240
* Ostensibily, we always want a context loaded for powersaving,
@@ -5291,7 +5291,7 @@ static int __intel_engines_record_defaults(struct drm_i915_private *i915)
52915291
for_each_engine(engine, i915, id) {
52925292
struct i915_vma *state;
52935293

5294-
state = ctx->engine[id].state;
5294+
state = to_intel_context(ctx, engine)->state;
52955295
if (!state)
52965296
continue;
52975297

‎drivers/gpu/drm/i915/i915_gem_context.c

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -117,15 +117,15 @@ static void lut_close(struct i915_gem_context *ctx)
117117

118118
static void i915_gem_context_free(struct i915_gem_context *ctx)
119119
{
120-
int i;
120+
unsigned int n;
121121

122122
lockdep_assert_held(&ctx->i915->drm.struct_mutex);
123123
GEM_BUG_ON(!i915_gem_context_is_closed(ctx));
124124

125125
i915_ppgtt_put(ctx->ppgtt);
126126

127-
for (i = 0; i < I915_NUM_ENGINES; i++) {
128-
struct intel_context *ce = &ctx->engine[i];
127+
for (n = 0; n < ARRAY_SIZE(ctx->__engine); n++) {
128+
struct intel_context *ce = &ctx->__engine[n];
129129

130130
if (!ce->state)
131131
continue;
@@ -521,7 +521,7 @@ void i915_gem_contexts_lost(struct drm_i915_private *dev_priv)
521521
if (!engine->last_retired_context)
522522
continue;
523523

524-
engine->context_unpin(engine, engine->last_retired_context);
524+
intel_context_unpin(engine->last_retired_context, engine);
525525
engine->last_retired_context = NULL;
526526
}
527527
}

‎drivers/gpu/drm/i915/i915_gem_context.h

Lines changed: 29 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -149,7 +149,7 @@ struct i915_gem_context {
149149
u32 *lrc_reg_state;
150150
u64 lrc_desc;
151151
int pin_count;
152-
} engine[I915_NUM_ENGINES];
152+
} __engine[I915_NUM_ENGINES];
153153

154154
/** ring_size: size for allocating the per-engine ring buffer */
155155
u32 ring_size;
@@ -256,6 +256,34 @@ static inline bool i915_gem_context_is_kernel(struct i915_gem_context *ctx)
256256
return !ctx->file_priv;
257257
}
258258

259+
static inline struct intel_context *
260+
to_intel_context(struct i915_gem_context *ctx,
261+
const struct intel_engine_cs *engine)
262+
{
263+
return &ctx->__engine[engine->id];
264+
}
265+
266+
static inline struct intel_ring *
267+
intel_context_pin(struct i915_gem_context *ctx, struct intel_engine_cs *engine)
268+
{
269+
return engine->context_pin(engine, ctx);
270+
}
271+
272+
static inline void __intel_context_pin(struct i915_gem_context *ctx,
273+
const struct intel_engine_cs *engine)
274+
{
275+
struct intel_context *ce = to_intel_context(ctx, engine);
276+
277+
GEM_BUG_ON(!ce->pin_count);
278+
ce->pin_count++;
279+
}
280+
281+
static inline void intel_context_unpin(struct i915_gem_context *ctx,
282+
struct intel_engine_cs *engine)
283+
{
284+
engine->context_unpin(engine, ctx);
285+
}
286+
259287
/* i915_gem_context.c */
260288
int __must_check i915_gem_contexts_init(struct drm_i915_private *dev_priv);
261289
void i915_gem_contexts_lost(struct drm_i915_private *dev_priv);

‎drivers/gpu/drm/i915/i915_gpu_error.c

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1472,7 +1472,8 @@ static void gem_record_rings(struct i915_gpu_state *error)
14721472

14731473
ee->ctx =
14741474
i915_error_object_create(i915,
1475-
request->ctx->engine[i].state);
1475+
to_intel_context(request->ctx,
1476+
engine)->state);
14761477

14771478
error->simulated |=
14781479
i915_gem_context_no_error_capture(request->ctx);

‎drivers/gpu/drm/i915/i915_perf.c

Lines changed: 5 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1234,7 +1234,7 @@ static int oa_get_render_ctx_id(struct i915_perf_stream *stream)
12341234
*
12351235
* NB: implied RCS engine...
12361236
*/
1237-
ring = engine->context_pin(engine, stream->ctx);
1237+
ring = intel_context_pin(stream->ctx, engine);
12381238
mutex_unlock(&dev_priv->drm.struct_mutex);
12391239
if (IS_ERR(ring))
12401240
return PTR_ERR(ring);
@@ -1246,7 +1246,7 @@ static int oa_get_render_ctx_id(struct i915_perf_stream *stream)
12461246
* with gen8+ and execlists
12471247
*/
12481248
dev_priv->perf.oa.specific_ctx_id =
1249-
i915_ggtt_offset(stream->ctx->engine[engine->id].state);
1249+
i915_ggtt_offset(to_intel_context(stream->ctx, engine)->state);
12501250
}
12511251

12521252
return 0;
@@ -1271,7 +1271,7 @@ static void oa_put_render_ctx_id(struct i915_perf_stream *stream)
12711271
mutex_lock(&dev_priv->drm.struct_mutex);
12721272

12731273
dev_priv->perf.oa.specific_ctx_id = INVALID_CTX_ID;
1274-
engine->context_unpin(engine, stream->ctx);
1274+
intel_context_unpin(stream->ctx, engine);
12751275

12761276
mutex_unlock(&dev_priv->drm.struct_mutex);
12771277
}
@@ -1759,6 +1759,7 @@ static int gen8_switch_to_updated_kernel_context(struct drm_i915_private *dev_pr
17591759
static int gen8_configure_all_contexts(struct drm_i915_private *dev_priv,
17601760
const struct i915_oa_config *oa_config)
17611761
{
1762+
struct intel_engine_cs *engine = dev_priv->engine[RCS];
17621763
struct i915_gem_context *ctx;
17631764
int ret;
17641765
unsigned int wait_flags = I915_WAIT_LOCKED;
@@ -1789,7 +1790,7 @@ static int gen8_configure_all_contexts(struct drm_i915_private *dev_priv,
17891790

17901791
/* Update all contexts now that we've stalled the submission. */
17911792
list_for_each_entry(ctx, &dev_priv->contexts.list, link) {
1792-
struct intel_context *ce = &ctx->engine[RCS];
1793+
struct intel_context *ce = to_intel_context(ctx, engine);
17931794
u32 *regs;
17941795

17951796
/* OA settings will be set upon first use */

‎drivers/gpu/drm/i915/i915_request.c

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -409,7 +409,7 @@ static void i915_request_retire(struct i915_request *request)
409409
* the subsequent request.
410410
*/
411411
if (engine->last_retired_context)
412-
engine->context_unpin(engine, engine->last_retired_context);
412+
intel_context_unpin(engine->last_retired_context, engine);
413413
engine->last_retired_context = request->ctx;
414414

415415
spin_lock_irq(&request->lock);
@@ -638,7 +638,7 @@ i915_request_alloc(struct intel_engine_cs *engine, struct i915_gem_context *ctx)
638638
* GGTT space, so do this first before we reserve a seqno for
639639
* ourselves.
640640
*/
641-
ring = engine->context_pin(engine, ctx);
641+
ring = intel_context_pin(ctx, engine);
642642
if (IS_ERR(ring))
643643
return ERR_CAST(ring);
644644
GEM_BUG_ON(!ring);
@@ -787,7 +787,7 @@ i915_request_alloc(struct intel_engine_cs *engine, struct i915_gem_context *ctx)
787787
err_unreserve:
788788
unreserve_gt(i915);
789789
err_unpin:
790-
engine->context_unpin(engine, ctx);
790+
intel_context_unpin(ctx, engine);
791791
return ERR_PTR(ret);
792792
}
793793

‎drivers/gpu/drm/i915/intel_engine_cs.c

Lines changed: 6 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -685,7 +685,7 @@ int intel_engine_init_common(struct intel_engine_cs *engine)
685685
* be available. To avoid this we always pin the default
686686
* context.
687687
*/
688-
ring = engine->context_pin(engine, engine->i915->kernel_context);
688+
ring = intel_context_pin(engine->i915->kernel_context, engine);
689689
if (IS_ERR(ring))
690690
return PTR_ERR(ring);
691691

@@ -694,8 +694,7 @@ int intel_engine_init_common(struct intel_engine_cs *engine)
694694
* we can interrupt the engine at any time.
695695
*/
696696
if (engine->i915->preempt_context) {
697-
ring = engine->context_pin(engine,
698-
engine->i915->preempt_context);
697+
ring = intel_context_pin(engine->i915->preempt_context, engine);
699698
if (IS_ERR(ring)) {
700699
ret = PTR_ERR(ring);
701700
goto err_unpin_kernel;
@@ -719,9 +718,9 @@ int intel_engine_init_common(struct intel_engine_cs *engine)
719718
intel_engine_fini_breadcrumbs(engine);
720719
err_unpin_preempt:
721720
if (engine->i915->preempt_context)
722-
engine->context_unpin(engine, engine->i915->preempt_context);
721+
intel_context_unpin(engine->i915->preempt_context, engine);
723722
err_unpin_kernel:
724-
engine->context_unpin(engine, engine->i915->kernel_context);
723+
intel_context_unpin(engine->i915->kernel_context, engine);
725724
return ret;
726725
}
727726

@@ -749,8 +748,8 @@ void intel_engine_cleanup_common(struct intel_engine_cs *engine)
749748
i915_gem_object_put(engine->default_state);
750749

751750
if (engine->i915->preempt_context)
752-
engine->context_unpin(engine, engine->i915->preempt_context);
753-
engine->context_unpin(engine, engine->i915->kernel_context);
751+
intel_context_unpin(engine->i915->preempt_context, engine);
752+
intel_context_unpin(engine->i915->kernel_context, engine);
754753
}
755754

756755
u64 intel_engine_get_active_head(const struct intel_engine_cs *engine)

‎drivers/gpu/drm/i915/intel_guc_ads.c

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -121,7 +121,8 @@ int intel_guc_ads_create(struct intel_guc *guc)
121121
* to find it. Note that we have to skip our header (1 page),
122122
* because our GuC shared data is there.
123123
*/
124-
kernel_ctx_vma = dev_priv->kernel_context->engine[RCS].state;
124+
kernel_ctx_vma = to_intel_context(dev_priv->kernel_context,
125+
dev_priv->engine[RCS])->state;
125126
blob->ads.golden_context_lrca =
126127
intel_guc_ggtt_offset(guc, kernel_ctx_vma) + skipped_offset;
127128

‎drivers/gpu/drm/i915/intel_guc_submission.c

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -362,7 +362,7 @@ static void guc_stage_desc_init(struct intel_guc *guc,
362362
desc->db_id = client->doorbell_id;
363363

364364
for_each_engine_masked(engine, dev_priv, client->engines, tmp) {
365-
struct intel_context *ce = &ctx->engine[engine->id];
365+
struct intel_context *ce = to_intel_context(ctx, engine);
366366
u32 guc_engine_id = engine->guc_id;
367367
struct guc_execlist_context *lrc = &desc->lrc[guc_engine_id];
368368

@@ -990,7 +990,8 @@ static void guc_fill_preempt_context(struct intel_guc *guc)
990990
enum intel_engine_id id;
991991

992992
for_each_engine(engine, dev_priv, id) {
993-
struct intel_context *ce = &client->owner->engine[id];
993+
struct intel_context *ce =
994+
to_intel_context(client->owner, engine);
994995
u32 addr = intel_hws_preempt_done_address(engine);
995996
u32 *cs;
996997

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