MIPS: ath79: Fix the size of the MISC INTC registers in ar9132.dtsi

There is 2 registers that is 8 bytes long, not 4.

Signed-off-by: Alban Bedel <[email protected]>
Cc: Thomas Gleixner <[email protected]>
Cc: Jason Cooper <[email protected]>
Cc: Marc Zyngier <[email protected]>
Cc: Alexander Couzens <[email protected]>
Cc: Joel Porquet <[email protected]>
Cc: Andrew Bresticker <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/11508/
Signed-off-by: Ralf Baechle <[email protected]>

Author: AlbanBedel

arch/mips/boot/dts/qca/ar9132.dtsi

@@ -107,7 +107,7 @@
 			miscintc: interrupt-controller@18060010 {
 				compatible = "qca,ar9132-misc-intc",
 					   "qca,ar7100-misc-intc";
-				reg = <0x18060010 0x4>;
+				reg = <0x18060010 0x8>;
 
 				interrupt-parent = <&cpuintc>;
 				interrupts = <6>;