|
78 | 78 | enable-active-high;
|
79 | 79 | };
|
80 | 80 |
|
| 81 | + hdmi_out: connector { |
| 82 | + compatible = "hdmi-connector"; |
| 83 | + label = "HDMI OUT"; |
| 84 | + type = "a"; |
| 85 | + |
| 86 | + port { |
| 87 | + hdmi_con: endpoint { |
| 88 | + remote-endpoint = <&dw_hdmi_out>; |
| 89 | + }; |
| 90 | + }; |
| 91 | + }; |
| 92 | + |
81 | 93 | ir: ir {
|
82 | 94 | compatible = "gpio-ir-receiver";
|
83 | 95 | gpios = <&gpe 3 GPIO_ACTIVE_LOW>;
|
|
102 | 114 | gpio = <&gpf 14 GPIO_ACTIVE_LOW>;
|
103 | 115 | enable-active-high;
|
104 | 116 | };
|
| 117 | + |
| 118 | + hdmi_power: fixedregulator@3 { |
| 119 | + compatible = "regulator-fixed"; |
| 120 | + |
| 121 | + regulator-name = "hdmi_power"; |
| 122 | + regulator-min-microvolt = <5000000>; |
| 123 | + regulator-max-microvolt = <5000000>; |
| 124 | + |
| 125 | + gpio = <&gpa 25 0>; |
| 126 | + enable-active-high; |
| 127 | + }; |
105 | 128 | };
|
106 | 129 |
|
107 | 130 | &ext {
|
|
114 | 137 | * precision.
|
115 | 138 | */
|
116 | 139 | assigned-clocks = <&cgu JZ4780_CLK_OTGPHY>, <&cgu JZ4780_CLK_RTC>,
|
117 |
| - <&cgu JZ4780_CLK_SSIPLL>, <&cgu JZ4780_CLK_SSI>; |
| 140 | + <&cgu JZ4780_CLK_SSIPLL>, <&cgu JZ4780_CLK_SSI>, |
| 141 | + <&cgu JZ4780_CLK_HDMI>; |
118 | 142 | assigned-clock-parents = <0>, <&cgu JZ4780_CLK_RTCLK>,
|
119 | 143 | <&cgu JZ4780_CLK_MPLL>,
|
120 | 144 | <&cgu JZ4780_CLK_SSIPLL>;
|
121 |
| - assigned-clock-rates = <48000000>, <0>, <54000000>; |
| 145 | + assigned-clock-rates = <48000000>, <0>, <54000000>, <0>, <27000000>; |
122 | 146 | };
|
123 | 147 |
|
124 | 148 | &tcu {
|
|
509 | 533 | bias-disable;
|
510 | 534 | };
|
511 | 535 |
|
| 536 | + pins_hdmi_ddc: hdmi_ddc { |
| 537 | + function = "hdmi-ddc"; |
| 538 | + groups = "hdmi-ddc"; |
| 539 | + bias-disable; |
| 540 | + }; |
| 541 | + |
512 | 542 | pins_nemc: nemc {
|
513 | 543 | function = "nemc";
|
514 | 544 | groups = "nemc-data", "nemc-cle-ale", "nemc-rd-we", "nemc-frd-fwe";
|
|
539 | 569 | bias-disable;
|
540 | 570 | };
|
541 | 571 | };
|
| 572 | + |
| 573 | +&hdmi { |
| 574 | + status = "okay"; |
| 575 | + |
| 576 | + pinctrl-names = "default"; |
| 577 | + pinctrl-0 = <&pins_hdmi_ddc>; |
| 578 | + |
| 579 | + hdmi-5v-supply = <&hdmi_power>; |
| 580 | + |
| 581 | + ports { |
| 582 | + #address-cells = <1>; |
| 583 | + #size-cells = <0>; |
| 584 | + |
| 585 | + port@0 { |
| 586 | + reg = <0>; |
| 587 | + dw_hdmi_in: endpoint { |
| 588 | + remote-endpoint = <&lcd_out>; |
| 589 | + }; |
| 590 | + }; |
| 591 | + |
| 592 | + port@1 { |
| 593 | + reg = <1>; |
| 594 | + dw_hdmi_out: endpoint { |
| 595 | + remote-endpoint = <&hdmi_con>; |
| 596 | + }; |
| 597 | + }; |
| 598 | + }; |
| 599 | +}; |
| 600 | + |
| 601 | +&lcdc0 { |
| 602 | + status = "okay"; |
| 603 | + |
| 604 | + port { |
| 605 | + lcd_out: endpoint { |
| 606 | + remote-endpoint = <&dw_hdmi_in>; |
| 607 | + }; |
| 608 | + }; |
| 609 | +}; |
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