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bus: ti-sysc: Fix 1-wire reset quirk
Because of the i2c quirk we have the reset quirks named in a confusing way. Let's fix the 1-wire quirk accordinlyg. Then let's switch to using better naming later on. Fixes: 4e23be4 ("bus: ti-sysc: Add support for module specific reset quirks") Signed-off-by: Tony Lindgren <[email protected]>
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drivers/bus/ti-sysc.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1400,7 +1400,7 @@ static void sysc_init_revision_quirks(struct sysc *ddata)
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}
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/* 1-wire needs module's internal clocks enabled for reset */
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static void sysc_clk_enable_quirk_hdq1w(struct sysc *ddata)
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static void sysc_pre_reset_quirk_hdq1w(struct sysc *ddata)
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{
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int offset = 0x0c; /* HDQ_CTRL_STATUS */
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u16 val;
@@ -1488,7 +1488,7 @@ static void sysc_init_module_quirks(struct sysc *ddata)
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return;
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if (ddata->cfg.quirks & SYSC_MODULE_QUIRK_HDQ1W) {
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ddata->clk_enable_quirk = sysc_clk_enable_quirk_hdq1w;
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ddata->clk_disable_quirk = sysc_pre_reset_quirk_hdq1w;
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return;
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}

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