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chanwoochoikrzk
chanwoochoi
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krzk
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ARM: dts: exynos: Add bus nodes using VDD_INT for Exynos542x SoC
This patch adds the AMBA bus nodes using VDD_INT for Exynos542x SoC. Exynos542x has the following AMBA buses to translate data between DRAM and sub-blocks. Following list specifies the detailed correlation between sub-block and clock: - CLK_DOUT_ACLK400_WCORE clock for WCORE's AXI - CLK_DOUT_ACLK100_NOC for NoC (Network on Chip)'s AXI - CLK_DOUT_PCLK200_FSYS for FSYS's APB - CLK_DOUT_ACLK200_FSYS for FSYS's AXI - CLK_DOUT_ACLK200_FSYS2 for FSYS2's AXI - CLK_DOUT_ACLK333 for MFC's AXI - CLK_DOUT_ACLK266 for GEN's AXI - CLK_DOUT_ACLK66 for PERIC/PERIR's AXI - CLK_DOUT_ACLK333_G2D for G2D's AXI - CLK_DOUT_ACLK266_G2D for ACP's AXI - CLK_DOUT_ACLK300_JPEG for JPEG's AXI - CLK_DOUT_ACLK166 for JPEG's APB - CLK_DOUT_ACLK300_DISP1 for FIMD's AXI - CLK_DOUT_ACLK400_DISP1 for DISP1's AXI - CLK_DOUT_ACLK300_GSCL for GSCL Scaler's AXI - CLK_DOUT_ACLK400_MSCL for MSCL's AXI Signed-off-by: Chanwoo Choi <[email protected]> Tested-by: Markus Reichl <[email protected]> Tested-by: Anand Moon <[email protected]> Reviewed-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Krzysztof Kozlowski <[email protected]>
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‎arch/arm/boot/dts/exynos5420.dtsi

Lines changed: 371 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1224,6 +1224,377 @@
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power-domains = <&disp_pd>;
12251225
#iommu-cells = <0>;
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};
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bus_wcore: bus_wcore {
1229+
compatible = "samsung,exynos-bus";
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clocks = <&clock CLK_DOUT_ACLK400_WCORE>;
1231+
clock-names = "bus";
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operating-points-v2 = <&bus_wcore_opp_table>;
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status = "disabled";
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};
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bus_noc: bus_noc {
1237+
compatible = "samsung,exynos-bus";
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clocks = <&clock CLK_DOUT_ACLK100_NOC>;
1239+
clock-names = "bus";
1240+
operating-points-v2 = <&bus_noc_opp_table>;
1241+
status = "disabled";
1242+
};
1243+
1244+
bus_fsys_apb: bus_fsys_apb {
1245+
compatible = "samsung,exynos-bus";
1246+
clocks = <&clock CLK_DOUT_PCLK200_FSYS>;
1247+
clock-names = "bus";
1248+
operating-points-v2 = <&bus_fsys_apb_opp_table>;
1249+
status = "disabled";
1250+
};
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bus_fsys: bus_fsys {
1253+
compatible = "samsung,exynos-bus";
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clocks = <&clock CLK_DOUT_ACLK200_FSYS>;
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clock-names = "bus";
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operating-points-v2 = <&bus_fsys_apb_opp_table>;
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status = "disabled";
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};
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bus_fsys2: bus_fsys2 {
1261+
compatible = "samsung,exynos-bus";
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clocks = <&clock CLK_DOUT_ACLK200_FSYS2>;
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clock-names = "bus";
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operating-points-v2 = <&bus_fsys2_opp_table>;
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status = "disabled";
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};
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bus_mfc: bus_mfc {
1269+
compatible = "samsung,exynos-bus";
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clocks = <&clock CLK_DOUT_ACLK333>;
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clock-names = "bus";
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operating-points-v2 = <&bus_mfc_opp_table>;
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status = "disabled";
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};
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bus_gen: bus_gen {
1277+
compatible = "samsung,exynos-bus";
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clocks = <&clock CLK_DOUT_ACLK266>;
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clock-names = "bus";
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operating-points-v2 = <&bus_gen_opp_table>;
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status = "disabled";
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};
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bus_peri: bus_peri {
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compatible = "samsung,exynos-bus";
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clocks = <&clock CLK_DOUT_ACLK66>;
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clock-names = "bus";
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operating-points-v2 = <&bus_peri_opp_table>;
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status = "disabled";
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};
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bus_g2d: bus_g2d {
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compatible = "samsung,exynos-bus";
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clocks = <&clock CLK_DOUT_ACLK333_G2D>;
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clock-names = "bus";
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operating-points-v2 = <&bus_g2d_opp_table>;
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status = "disabled";
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};
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bus_g2d_acp: bus_g2d_acp {
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compatible = "samsung,exynos-bus";
1302+
clocks = <&clock CLK_DOUT_ACLK266_G2D>;
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clock-names = "bus";
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operating-points-v2 = <&bus_g2d_acp_opp_table>;
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status = "disabled";
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};
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bus_jpeg: bus_jpeg {
1309+
compatible = "samsung,exynos-bus";
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clocks = <&clock CLK_DOUT_ACLK300_JPEG>;
1311+
clock-names = "bus";
1312+
operating-points-v2 = <&bus_jpeg_opp_table>;
1313+
status = "disabled";
1314+
};
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1316+
bus_jpeg_apb: bus_jpeg_apb {
1317+
compatible = "samsung,exynos-bus";
1318+
clocks = <&clock CLK_DOUT_ACLK166>;
1319+
clock-names = "bus";
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operating-points-v2 = <&bus_jpeg_apb_opp_table>;
1321+
status = "disabled";
1322+
};
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bus_disp1_fimd: bus_disp1_fimd {
1325+
compatible = "samsung,exynos-bus";
1326+
clocks = <&clock CLK_DOUT_ACLK300_DISP1>;
1327+
clock-names = "bus";
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operating-points-v2 = <&bus_disp1_fimd_opp_table>;
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status = "disabled";
1330+
};
1331+
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bus_disp1: bus_disp1 {
1333+
compatible = "samsung,exynos-bus";
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clocks = <&clock CLK_DOUT_ACLK400_DISP1>;
1335+
clock-names = "bus";
1336+
operating-points-v2 = <&bus_disp1_opp_table>;
1337+
status = "disabled";
1338+
};
1339+
1340+
bus_gscl_scaler: bus_gscl_scaler {
1341+
compatible = "samsung,exynos-bus";
1342+
clocks = <&clock CLK_DOUT_ACLK300_GSCL>;
1343+
clock-names = "bus";
1344+
operating-points-v2 = <&bus_gscl_opp_table>;
1345+
status = "disabled";
1346+
};
1347+
1348+
bus_mscl: bus_mscl {
1349+
compatible = "samsung,exynos-bus";
1350+
clocks = <&clock CLK_DOUT_ACLK400_MSCL>;
1351+
clock-names = "bus";
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operating-points-v2 = <&bus_mscl_opp_table>;
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status = "disabled";
1354+
};
1355+
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bus_wcore_opp_table: opp_table2 {
1357+
compatible = "operating-points-v2";
1358+
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opp00 {
1360+
opp-hz = /bits/ 64 <84000000>;
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opp-microvolt = <925000>;
1362+
};
1363+
opp01 {
1364+
opp-hz = /bits/ 64 <111000000>;
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opp-microvolt = <950000>;
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};
1367+
opp02 {
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opp-hz = /bits/ 64 <222000000>;
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opp-microvolt = <950000>;
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};
1371+
opp03 {
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opp-hz = /bits/ 64 <333000000>;
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opp-microvolt = <950000>;
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};
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opp04 {
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opp-hz = /bits/ 64 <400000000>;
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opp-microvolt = <987500>;
1378+
};
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};
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bus_noc_opp_table: opp_table3 {
1382+
compatible = "operating-points-v2";
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opp00 {
1385+
opp-hz = /bits/ 64 <67000000>;
1386+
};
1387+
opp01 {
1388+
opp-hz = /bits/ 64 <75000000>;
1389+
};
1390+
opp02 {
1391+
opp-hz = /bits/ 64 <86000000>;
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};
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opp03 {
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opp-hz = /bits/ 64 <100000000>;
1395+
};
1396+
};
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1398+
bus_fsys_apb_opp_table: opp_table4 {
1399+
compatible = "operating-points-v2";
1400+
opp-shared;
1401+
1402+
opp00 {
1403+
opp-hz = /bits/ 64 <100000000>;
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};
1405+
opp01 {
1406+
opp-hz = /bits/ 64 <200000000>;
1407+
};
1408+
};
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bus_fsys2_opp_table: opp_table5 {
1411+
compatible = "operating-points-v2";
1412+
1413+
opp00 {
1414+
opp-hz = /bits/ 64 <75000000>;
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};
1416+
opp01 {
1417+
opp-hz = /bits/ 64 <100000000>;
1418+
};
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opp02 {
1420+
opp-hz = /bits/ 64 <150000000>;
1421+
};
1422+
};
1423+
1424+
bus_mfc_opp_table: opp_table6 {
1425+
compatible = "operating-points-v2";
1426+
1427+
opp00 {
1428+
opp-hz = /bits/ 64 <96000000>;
1429+
};
1430+
opp01 {
1431+
opp-hz = /bits/ 64 <111000000>;
1432+
};
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opp02 {
1434+
opp-hz = /bits/ 64 <167000000>;
1435+
};
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opp03 {
1437+
opp-hz = /bits/ 64 <222000000>;
1438+
};
1439+
opp04 {
1440+
opp-hz = /bits/ 64 <333000000>;
1441+
};
1442+
};
1443+
1444+
bus_gen_opp_table: opp_table7 {
1445+
compatible = "operating-points-v2";
1446+
1447+
opp00 {
1448+
opp-hz = /bits/ 64 <89000000>;
1449+
};
1450+
opp01 {
1451+
opp-hz = /bits/ 64 <133000000>;
1452+
};
1453+
opp02 {
1454+
opp-hz = /bits/ 64 <178000000>;
1455+
};
1456+
opp03 {
1457+
opp-hz = /bits/ 64 <267000000>;
1458+
};
1459+
};
1460+
1461+
bus_peri_opp_table: opp_table8 {
1462+
compatible = "operating-points-v2";
1463+
1464+
opp00 {
1465+
opp-hz = /bits/ 64 <67000000>;
1466+
};
1467+
};
1468+
1469+
bus_g2d_opp_table: opp_table9 {
1470+
compatible = "operating-points-v2";
1471+
1472+
opp00 {
1473+
opp-hz = /bits/ 64 <84000000>;
1474+
};
1475+
opp01 {
1476+
opp-hz = /bits/ 64 <167000000>;
1477+
};
1478+
opp02 {
1479+
opp-hz = /bits/ 64 <222000000>;
1480+
};
1481+
opp03 {
1482+
opp-hz = /bits/ 64 <300000000>;
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};
1484+
opp04 {
1485+
opp-hz = /bits/ 64 <333000000>;
1486+
};
1487+
};
1488+
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bus_g2d_acp_opp_table: opp_table10 {
1490+
compatible = "operating-points-v2";
1491+
1492+
opp00 {
1493+
opp-hz = /bits/ 64 <67000000>;
1494+
};
1495+
opp01 {
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opp-hz = /bits/ 64 <133000000>;
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};
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opp02 {
1499+
opp-hz = /bits/ 64 <178000000>;
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};
1501+
opp03 {
1502+
opp-hz = /bits/ 64 <267000000>;
1503+
};
1504+
};
1505+
1506+
bus_jpeg_opp_table: opp_table11 {
1507+
compatible = "operating-points-v2";
1508+
1509+
opp00 {
1510+
opp-hz = /bits/ 64 <75000000>;
1511+
};
1512+
opp01 {
1513+
opp-hz = /bits/ 64 <150000000>;
1514+
};
1515+
opp02 {
1516+
opp-hz = /bits/ 64 <200000000>;
1517+
};
1518+
opp03 {
1519+
opp-hz = /bits/ 64 <300000000>;
1520+
};
1521+
};
1522+
1523+
bus_jpeg_apb_opp_table: opp_table12 {
1524+
compatible = "operating-points-v2";
1525+
1526+
opp00 {
1527+
opp-hz = /bits/ 64 <84000000>;
1528+
};
1529+
opp01 {
1530+
opp-hz = /bits/ 64 <111000000>;
1531+
};
1532+
opp02 {
1533+
opp-hz = /bits/ 64 <134000000>;
1534+
};
1535+
opp03 {
1536+
opp-hz = /bits/ 64 <167000000>;
1537+
};
1538+
};
1539+
1540+
bus_disp1_fimd_opp_table: opp_table13 {
1541+
compatible = "operating-points-v2";
1542+
1543+
opp00 {
1544+
opp-hz = /bits/ 64 <120000000>;
1545+
};
1546+
opp01 {
1547+
opp-hz = /bits/ 64 <200000000>;
1548+
};
1549+
};
1550+
1551+
bus_disp1_opp_table: opp_table14 {
1552+
compatible = "operating-points-v2";
1553+
1554+
opp00 {
1555+
opp-hz = /bits/ 64 <120000000>;
1556+
};
1557+
opp01 {
1558+
opp-hz = /bits/ 64 <200000000>;
1559+
};
1560+
opp02 {
1561+
opp-hz = /bits/ 64 <300000000>;
1562+
};
1563+
};
1564+
1565+
bus_gscl_opp_table: opp_table15 {
1566+
compatible = "operating-points-v2";
1567+
1568+
opp00 {
1569+
opp-hz = /bits/ 64 <150000000>;
1570+
};
1571+
opp01 {
1572+
opp-hz = /bits/ 64 <200000000>;
1573+
};
1574+
opp02 {
1575+
opp-hz = /bits/ 64 <300000000>;
1576+
};
1577+
};
1578+
1579+
bus_mscl_opp_table: opp_table16 {
1580+
compatible = "operating-points-v2";
1581+
1582+
opp00 {
1583+
opp-hz = /bits/ 64 <84000000>;
1584+
};
1585+
opp01 {
1586+
opp-hz = /bits/ 64 <167000000>;
1587+
};
1588+
opp02 {
1589+
opp-hz = /bits/ 64 <222000000>;
1590+
};
1591+
opp03 {
1592+
opp-hz = /bits/ 64 <333000000>;
1593+
};
1594+
opp04 {
1595+
opp-hz = /bits/ 64 <400000000>;
1596+
};
1597+
};
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};
12281599

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&dp {

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