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28 | 28 | #define DEVICE_CONTROL_CONFIG_GLOBAL_EN BIT(14)
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29 | 29 | #define DEVICE_CONTROL_CONFIG_ALL_EN BIT(13)
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30 | 30 |
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| 31 | +#define VEND1_PHY_IRQ_ACK 0x80A0 |
| 32 | +#define VEND1_PHY_IRQ_EN 0x80A1 |
| 33 | +#define VEND1_PHY_IRQ_STATUS 0x80A2 |
| 34 | +#define PHY_IRQ_LINK_EVENT BIT(1) |
| 35 | + |
31 | 36 | #define VEND1_PHY_CONTROL 0x8100
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32 | 37 | #define PHY_CONFIG_EN BIT(14)
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33 | 38 | #define PHY_START_OP BIT(0)
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@@ -188,6 +193,32 @@ static int nxp_c45_start_op(struct phy_device *phydev)
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188 | 193 | PHY_START_OP);
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189 | 194 | }
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190 | 195 |
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| 196 | +static int nxp_c45_config_intr(struct phy_device *phydev) |
| 197 | +{ |
| 198 | + if (phydev->interrupts == PHY_INTERRUPT_ENABLED) |
| 199 | + return phy_set_bits_mmd(phydev, MDIO_MMD_VEND1, |
| 200 | + VEND1_PHY_IRQ_EN, PHY_IRQ_LINK_EVENT); |
| 201 | + else |
| 202 | + return phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, |
| 203 | + VEND1_PHY_IRQ_EN, PHY_IRQ_LINK_EVENT); |
| 204 | +} |
| 205 | + |
| 206 | +static irqreturn_t nxp_c45_handle_interrupt(struct phy_device *phydev) |
| 207 | +{ |
| 208 | + irqreturn_t ret = IRQ_NONE; |
| 209 | + int irq; |
| 210 | + |
| 211 | + irq = phy_read_mmd(phydev, MDIO_MMD_VEND1, VEND1_PHY_IRQ_STATUS); |
| 212 | + if (irq & PHY_IRQ_LINK_EVENT) { |
| 213 | + phy_write_mmd(phydev, MDIO_MMD_VEND1, VEND1_PHY_IRQ_ACK, |
| 214 | + PHY_IRQ_LINK_EVENT); |
| 215 | + phy_trigger_machine(phydev); |
| 216 | + ret = IRQ_HANDLED; |
| 217 | + } |
| 218 | + |
| 219 | + return ret; |
| 220 | +} |
| 221 | + |
191 | 222 | static int nxp_c45_soft_reset(struct phy_device *phydev)
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192 | 223 | {
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193 | 224 | int ret;
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@@ -560,6 +591,8 @@ static struct phy_driver nxp_c45_driver[] = {
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560 | 591 | .soft_reset = nxp_c45_soft_reset,
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561 | 592 | .config_aneg = nxp_c45_config_aneg,
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562 | 593 | .config_init = nxp_c45_config_init,
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| 594 | + .config_intr = nxp_c45_config_intr, |
| 595 | + .handle_interrupt = nxp_c45_handle_interrupt, |
563 | 596 | .read_status = nxp_c45_read_status,
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564 | 597 | .suspend = genphy_c45_pma_suspend,
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565 | 598 | .resume = genphy_c45_pma_resume,
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