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Yury Norovdavem330
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net: thunderx: nicvf_queues: nivc_*_intr: remove duplication
The same switch-case repeates for nivc_*_intr functions. In this patch it is moved to a helper nicvf_int_type_to_mask(). By the way: - Unneeded write to NICVF register dropped if int_type is unknown. - netdev_dbg() is used instead of netdev_err(). Signed-off-by: Yury Norov <[email protected]> Signed-off-by: Aleksey Makarov <[email protected]> Acked-by: Vadim Lomovtsev <[email protected]> Signed-off-by: Sunil Goutham <[email protected]> Signed-off-by: David S. Miller <[email protected]>
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drivers/net/ethernet/cavium/thunder/nicvf_queues.c

Lines changed: 40 additions & 100 deletions
Original file line numberDiff line numberDiff line change
@@ -1234,153 +1234,93 @@ struct sk_buff *nicvf_get_rcv_skb(struct nicvf *nic, struct cqe_rx_t *cqe_rx)
12341234
return skb;
12351235
}
12361236

1237-
/* Enable interrupt */
1238-
void nicvf_enable_intr(struct nicvf *nic, int int_type, int q_idx)
1237+
static u64 nicvf_int_type_to_mask(int int_type, int q_idx)
12391238
{
12401239
u64 reg_val;
12411240

1242-
reg_val = nicvf_reg_read(nic, NIC_VF_ENA_W1S);
1243-
12441241
switch (int_type) {
12451242
case NICVF_INTR_CQ:
1246-
reg_val |= ((1ULL << q_idx) << NICVF_INTR_CQ_SHIFT);
1243+
reg_val = ((1ULL << q_idx) << NICVF_INTR_CQ_SHIFT);
12471244
break;
12481245
case NICVF_INTR_SQ:
1249-
reg_val |= ((1ULL << q_idx) << NICVF_INTR_SQ_SHIFT);
1246+
reg_val = ((1ULL << q_idx) << NICVF_INTR_SQ_SHIFT);
12501247
break;
12511248
case NICVF_INTR_RBDR:
1252-
reg_val |= ((1ULL << q_idx) << NICVF_INTR_RBDR_SHIFT);
1249+
reg_val = ((1ULL << q_idx) << NICVF_INTR_RBDR_SHIFT);
12531250
break;
12541251
case NICVF_INTR_PKT_DROP:
1255-
reg_val |= (1ULL << NICVF_INTR_PKT_DROP_SHIFT);
1252+
reg_val = (1ULL << NICVF_INTR_PKT_DROP_SHIFT);
12561253
break;
12571254
case NICVF_INTR_TCP_TIMER:
1258-
reg_val |= (1ULL << NICVF_INTR_TCP_TIMER_SHIFT);
1255+
reg_val = (1ULL << NICVF_INTR_TCP_TIMER_SHIFT);
12591256
break;
12601257
case NICVF_INTR_MBOX:
1261-
reg_val |= (1ULL << NICVF_INTR_MBOX_SHIFT);
1258+
reg_val = (1ULL << NICVF_INTR_MBOX_SHIFT);
12621259
break;
12631260
case NICVF_INTR_QS_ERR:
1264-
reg_val |= (1ULL << NICVF_INTR_QS_ERR_SHIFT);
1261+
reg_val = (1ULL << NICVF_INTR_QS_ERR_SHIFT);
12651262
break;
12661263
default:
1267-
netdev_err(nic->netdev,
1268-
"Failed to enable interrupt: unknown type\n");
1269-
break;
1264+
reg_val = 0;
12701265
}
12711266

1272-
nicvf_reg_write(nic, NIC_VF_ENA_W1S, reg_val);
1267+
return reg_val;
1268+
}
1269+
1270+
/* Enable interrupt */
1271+
void nicvf_enable_intr(struct nicvf *nic, int int_type, int q_idx)
1272+
{
1273+
u64 mask = nicvf_int_type_to_mask(int_type, q_idx);
1274+
1275+
if (!mask) {
1276+
netdev_dbg(nic->netdev,
1277+
"Failed to enable interrupt: unknown type\n");
1278+
return;
1279+
}
1280+
nicvf_reg_write(nic, NIC_VF_ENA_W1S,
1281+
nicvf_reg_read(nic, NIC_VF_ENA_W1S) | mask);
12731282
}
12741283

12751284
/* Disable interrupt */
12761285
void nicvf_disable_intr(struct nicvf *nic, int int_type, int q_idx)
12771286
{
1278-
u64 reg_val = 0;
1287+
u64 mask = nicvf_int_type_to_mask(int_type, q_idx);
12791288

1280-
switch (int_type) {
1281-
case NICVF_INTR_CQ:
1282-
reg_val |= ((1ULL << q_idx) << NICVF_INTR_CQ_SHIFT);
1283-
break;
1284-
case NICVF_INTR_SQ:
1285-
reg_val |= ((1ULL << q_idx) << NICVF_INTR_SQ_SHIFT);
1286-
break;
1287-
case NICVF_INTR_RBDR:
1288-
reg_val |= ((1ULL << q_idx) << NICVF_INTR_RBDR_SHIFT);
1289-
break;
1290-
case NICVF_INTR_PKT_DROP:
1291-
reg_val |= (1ULL << NICVF_INTR_PKT_DROP_SHIFT);
1292-
break;
1293-
case NICVF_INTR_TCP_TIMER:
1294-
reg_val |= (1ULL << NICVF_INTR_TCP_TIMER_SHIFT);
1295-
break;
1296-
case NICVF_INTR_MBOX:
1297-
reg_val |= (1ULL << NICVF_INTR_MBOX_SHIFT);
1298-
break;
1299-
case NICVF_INTR_QS_ERR:
1300-
reg_val |= (1ULL << NICVF_INTR_QS_ERR_SHIFT);
1301-
break;
1302-
default:
1303-
netdev_err(nic->netdev,
1289+
if (!mask) {
1290+
netdev_dbg(nic->netdev,
13041291
"Failed to disable interrupt: unknown type\n");
1305-
break;
1292+
return;
13061293
}
13071294

1308-
nicvf_reg_write(nic, NIC_VF_ENA_W1C, reg_val);
1295+
nicvf_reg_write(nic, NIC_VF_ENA_W1C, mask);
13091296
}
13101297

13111298
/* Clear interrupt */
13121299
void nicvf_clear_intr(struct nicvf *nic, int int_type, int q_idx)
13131300
{
1314-
u64 reg_val = 0;
1301+
u64 mask = nicvf_int_type_to_mask(int_type, q_idx);
13151302

1316-
switch (int_type) {
1317-
case NICVF_INTR_CQ:
1318-
reg_val = ((1ULL << q_idx) << NICVF_INTR_CQ_SHIFT);
1319-
break;
1320-
case NICVF_INTR_SQ:
1321-
reg_val = ((1ULL << q_idx) << NICVF_INTR_SQ_SHIFT);
1322-
break;
1323-
case NICVF_INTR_RBDR:
1324-
reg_val = ((1ULL << q_idx) << NICVF_INTR_RBDR_SHIFT);
1325-
break;
1326-
case NICVF_INTR_PKT_DROP:
1327-
reg_val = (1ULL << NICVF_INTR_PKT_DROP_SHIFT);
1328-
break;
1329-
case NICVF_INTR_TCP_TIMER:
1330-
reg_val = (1ULL << NICVF_INTR_TCP_TIMER_SHIFT);
1331-
break;
1332-
case NICVF_INTR_MBOX:
1333-
reg_val = (1ULL << NICVF_INTR_MBOX_SHIFT);
1334-
break;
1335-
case NICVF_INTR_QS_ERR:
1336-
reg_val |= (1ULL << NICVF_INTR_QS_ERR_SHIFT);
1337-
break;
1338-
default:
1339-
netdev_err(nic->netdev,
1303+
if (!mask) {
1304+
netdev_dbg(nic->netdev,
13401305
"Failed to clear interrupt: unknown type\n");
1341-
break;
1306+
return;
13421307
}
13431308

1344-
nicvf_reg_write(nic, NIC_VF_INT, reg_val);
1309+
nicvf_reg_write(nic, NIC_VF_INT, mask);
13451310
}
13461311

13471312
/* Check if interrupt is enabled */
13481313
int nicvf_is_intr_enabled(struct nicvf *nic, int int_type, int q_idx)
13491314
{
1350-
u64 reg_val;
1351-
u64 mask = 0xff;
1352-
1353-
reg_val = nicvf_reg_read(nic, NIC_VF_ENA_W1S);
1354-
1355-
switch (int_type) {
1356-
case NICVF_INTR_CQ:
1357-
mask = ((1ULL << q_idx) << NICVF_INTR_CQ_SHIFT);
1358-
break;
1359-
case NICVF_INTR_SQ:
1360-
mask = ((1ULL << q_idx) << NICVF_INTR_SQ_SHIFT);
1361-
break;
1362-
case NICVF_INTR_RBDR:
1363-
mask = ((1ULL << q_idx) << NICVF_INTR_RBDR_SHIFT);
1364-
break;
1365-
case NICVF_INTR_PKT_DROP:
1366-
mask = NICVF_INTR_PKT_DROP_MASK;
1367-
break;
1368-
case NICVF_INTR_TCP_TIMER:
1369-
mask = NICVF_INTR_TCP_TIMER_MASK;
1370-
break;
1371-
case NICVF_INTR_MBOX:
1372-
mask = NICVF_INTR_MBOX_MASK;
1373-
break;
1374-
case NICVF_INTR_QS_ERR:
1375-
mask = NICVF_INTR_QS_ERR_MASK;
1376-
break;
1377-
default:
1378-
netdev_err(nic->netdev,
1315+
u64 mask = nicvf_int_type_to_mask(int_type, q_idx);
1316+
/* If interrupt type is unknown, we treat it disabled. */
1317+
if (!mask) {
1318+
netdev_dbg(nic->netdev,
13791319
"Failed to check interrupt enable: unknown type\n");
1380-
break;
1320+
return 0;
13811321
}
13821322

1383-
return (reg_val & mask);
1323+
return mask & nicvf_reg_read(nic, NIC_VF_ENA_W1S);
13841324
}
13851325

13861326
void nicvf_update_rq_stats(struct nicvf *nic, int rq_idx)

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