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pcercueilinusw
pcercuei
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linusw
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pinctrl: ingenic: Rename registers from JZ4760_GPIO_* to JZ4770_GPIO_*
Now that JZ4760 support has been fixed, it looks wrong to have JZ4760_GPIO_* registers being written if the SoC is a JZ4770 or later. Signed-off-by: Paul Cercueil <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Linus Walleij <[email protected]>
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‎drivers/pinctrl/pinctrl-ingenic.c

Lines changed: 27 additions & 27 deletions
Original file line numberDiff line numberDiff line change
@@ -37,11 +37,11 @@
3737
#define JZ4740_GPIO_TRIG 0x70
3838
#define JZ4740_GPIO_FLAG 0x80
3939

40-
#define JZ4760_GPIO_INT 0x10
41-
#define JZ4760_GPIO_PAT1 0x30
42-
#define JZ4760_GPIO_PAT0 0x40
43-
#define JZ4760_GPIO_FLAG 0x50
44-
#define JZ4760_GPIO_PEN 0x70
40+
#define JZ4770_GPIO_INT 0x10
41+
#define JZ4770_GPIO_PAT1 0x30
42+
#define JZ4770_GPIO_PAT0 0x40
43+
#define JZ4770_GPIO_FLAG 0x50
44+
#define JZ4770_GPIO_PEN 0x70
4545

4646
#define X1830_GPIO_PEL 0x110
4747
#define X1830_GPIO_PEH 0x120
@@ -1689,7 +1689,7 @@ static void ingenic_gpio_set_value(struct ingenic_gpio_chip *jzgc,
16891689
u8 offset, int value)
16901690
{
16911691
if (jzgc->jzpc->info->version >= ID_JZ4770)
1692-
ingenic_gpio_set_bit(jzgc, JZ4760_GPIO_PAT0, offset, !!value);
1692+
ingenic_gpio_set_bit(jzgc, JZ4770_GPIO_PAT0, offset, !!value);
16931693
else
16941694
ingenic_gpio_set_bit(jzgc, JZ4740_GPIO_DATA, offset, !!value);
16951695
}
@@ -1719,8 +1719,8 @@ static void irq_set_type(struct ingenic_gpio_chip *jzgc,
17191719
}
17201720

17211721
if (jzgc->jzpc->info->version >= ID_JZ4770) {
1722-
reg1 = JZ4760_GPIO_PAT1;
1723-
reg2 = JZ4760_GPIO_PAT0;
1722+
reg1 = JZ4770_GPIO_PAT1;
1723+
reg2 = JZ4770_GPIO_PAT0;
17241724
} else {
17251725
reg1 = JZ4740_GPIO_TRIG;
17261726
reg2 = JZ4740_GPIO_DIR;
@@ -1759,7 +1759,7 @@ static void ingenic_gpio_irq_enable(struct irq_data *irqd)
17591759
int irq = irqd->hwirq;
17601760

17611761
if (jzgc->jzpc->info->version >= ID_JZ4770)
1762-
ingenic_gpio_set_bit(jzgc, JZ4760_GPIO_INT, irq, true);
1762+
ingenic_gpio_set_bit(jzgc, JZ4770_GPIO_INT, irq, true);
17631763
else
17641764
ingenic_gpio_set_bit(jzgc, JZ4740_GPIO_SELECT, irq, true);
17651765

@@ -1775,7 +1775,7 @@ static void ingenic_gpio_irq_disable(struct irq_data *irqd)
17751775
ingenic_gpio_irq_mask(irqd);
17761776

17771777
if (jzgc->jzpc->info->version >= ID_JZ4770)
1778-
ingenic_gpio_set_bit(jzgc, JZ4760_GPIO_INT, irq, false);
1778+
ingenic_gpio_set_bit(jzgc, JZ4770_GPIO_INT, irq, false);
17791779
else
17801780
ingenic_gpio_set_bit(jzgc, JZ4740_GPIO_SELECT, irq, false);
17811781
}
@@ -1800,7 +1800,7 @@ static void ingenic_gpio_irq_ack(struct irq_data *irqd)
18001800
}
18011801

18021802
if (jzgc->jzpc->info->version >= ID_JZ4770)
1803-
ingenic_gpio_set_bit(jzgc, JZ4760_GPIO_FLAG, irq, false);
1803+
ingenic_gpio_set_bit(jzgc, JZ4770_GPIO_FLAG, irq, false);
18041804
else
18051805
ingenic_gpio_set_bit(jzgc, JZ4740_GPIO_DATA, irq, true);
18061806
}
@@ -1857,7 +1857,7 @@ static void ingenic_gpio_irq_handler(struct irq_desc *desc)
18571857
chained_irq_enter(irq_chip, desc);
18581858

18591859
if (jzgc->jzpc->info->version >= ID_JZ4770)
1860-
flag = ingenic_gpio_read_reg(jzgc, JZ4760_GPIO_FLAG);
1860+
flag = ingenic_gpio_read_reg(jzgc, JZ4770_GPIO_FLAG);
18611861
else
18621862
flag = ingenic_gpio_read_reg(jzgc, JZ4740_GPIO_FLAG);
18631863

@@ -1939,8 +1939,8 @@ static int ingenic_gpio_get_direction(struct gpio_chip *gc, unsigned int offset)
19391939
unsigned int pin = gc->base + offset;
19401940

19411941
if (jzpc->info->version >= ID_JZ4770) {
1942-
if (ingenic_get_pin_config(jzpc, pin, JZ4760_GPIO_INT) ||
1943-
ingenic_get_pin_config(jzpc, pin, JZ4760_GPIO_PAT1))
1942+
if (ingenic_get_pin_config(jzpc, pin, JZ4770_GPIO_INT) ||
1943+
ingenic_get_pin_config(jzpc, pin, JZ4770_GPIO_PAT1))
19441944
return GPIO_LINE_DIRECTION_IN;
19451945
return GPIO_LINE_DIRECTION_OUT;
19461946
}
@@ -1991,16 +1991,16 @@ static int ingenic_pinmux_set_pin_fn(struct ingenic_pinctrl *jzpc,
19911991
'A' + offt, idx, func);
19921992

19931993
if (jzpc->info->version >= ID_X1000) {
1994-
ingenic_shadow_config_pin(jzpc, pin, JZ4760_GPIO_INT, false);
1994+
ingenic_shadow_config_pin(jzpc, pin, JZ4770_GPIO_INT, false);
19951995
ingenic_shadow_config_pin(jzpc, pin, GPIO_MSK, false);
1996-
ingenic_shadow_config_pin(jzpc, pin, JZ4760_GPIO_PAT1, func & 0x2);
1997-
ingenic_shadow_config_pin(jzpc, pin, JZ4760_GPIO_PAT0, func & 0x1);
1996+
ingenic_shadow_config_pin(jzpc, pin, JZ4770_GPIO_PAT1, func & 0x2);
1997+
ingenic_shadow_config_pin(jzpc, pin, JZ4770_GPIO_PAT0, func & 0x1);
19981998
ingenic_shadow_config_pin_load(jzpc, pin);
19991999
} else if (jzpc->info->version >= ID_JZ4770) {
2000-
ingenic_config_pin(jzpc, pin, JZ4760_GPIO_INT, false);
2000+
ingenic_config_pin(jzpc, pin, JZ4770_GPIO_INT, false);
20012001
ingenic_config_pin(jzpc, pin, GPIO_MSK, false);
2002-
ingenic_config_pin(jzpc, pin, JZ4760_GPIO_PAT1, func & 0x2);
2003-
ingenic_config_pin(jzpc, pin, JZ4760_GPIO_PAT0, func & 0x1);
2002+
ingenic_config_pin(jzpc, pin, JZ4770_GPIO_PAT1, func & 0x2);
2003+
ingenic_config_pin(jzpc, pin, JZ4770_GPIO_PAT0, func & 0x1);
20042004
} else {
20052005
ingenic_config_pin(jzpc, pin, JZ4740_GPIO_FUNC, true);
20062006
ingenic_config_pin(jzpc, pin, JZ4740_GPIO_TRIG, func & 0x2);
@@ -2057,14 +2057,14 @@ static int ingenic_pinmux_gpio_set_direction(struct pinctrl_dev *pctldev,
20572057
'A' + offt, idx, input ? "in" : "out");
20582058

20592059
if (jzpc->info->version >= ID_X1000) {
2060-
ingenic_shadow_config_pin(jzpc, pin, JZ4760_GPIO_INT, false);
2060+
ingenic_shadow_config_pin(jzpc, pin, JZ4770_GPIO_INT, false);
20612061
ingenic_shadow_config_pin(jzpc, pin, GPIO_MSK, true);
2062-
ingenic_shadow_config_pin(jzpc, pin, JZ4760_GPIO_PAT1, input);
2062+
ingenic_shadow_config_pin(jzpc, pin, JZ4770_GPIO_PAT1, input);
20632063
ingenic_shadow_config_pin_load(jzpc, pin);
20642064
} else if (jzpc->info->version >= ID_JZ4770) {
2065-
ingenic_config_pin(jzpc, pin, JZ4760_GPIO_INT, false);
2065+
ingenic_config_pin(jzpc, pin, JZ4770_GPIO_INT, false);
20662066
ingenic_config_pin(jzpc, pin, GPIO_MSK, true);
2067-
ingenic_config_pin(jzpc, pin, JZ4760_GPIO_PAT1, input);
2067+
ingenic_config_pin(jzpc, pin, JZ4770_GPIO_PAT1, input);
20682068
} else {
20692069
ingenic_config_pin(jzpc, pin, JZ4740_GPIO_SELECT, false);
20702070
ingenic_config_pin(jzpc, pin, JZ4740_GPIO_DIR, !input);
@@ -2092,7 +2092,7 @@ static int ingenic_pinconf_get(struct pinctrl_dev *pctldev,
20922092
bool pull;
20932093

20942094
if (jzpc->info->version >= ID_JZ4770)
2095-
pull = !ingenic_get_pin_config(jzpc, pin, JZ4760_GPIO_PEN);
2095+
pull = !ingenic_get_pin_config(jzpc, pin, JZ4770_GPIO_PEN);
20962096
else
20972097
pull = !ingenic_get_pin_config(jzpc, pin, JZ4740_GPIO_PULL_DIS);
20982098

@@ -2142,7 +2142,7 @@ static void ingenic_set_bias(struct ingenic_pinctrl *jzpc,
21422142
}
21432143

21442144
} else if (jzpc->info->version >= ID_JZ4770) {
2145-
ingenic_config_pin(jzpc, pin, JZ4760_GPIO_PEN, !bias);
2145+
ingenic_config_pin(jzpc, pin, JZ4770_GPIO_PEN, !bias);
21462146
} else {
21472147
ingenic_config_pin(jzpc, pin, JZ4740_GPIO_PULL_DIS, !bias);
21482148
}
@@ -2152,7 +2152,7 @@ static void ingenic_set_output_level(struct ingenic_pinctrl *jzpc,
21522152
unsigned int pin, bool high)
21532153
{
21542154
if (jzpc->info->version >= ID_JZ4770)
2155-
ingenic_config_pin(jzpc, pin, JZ4760_GPIO_PAT0, high);
2155+
ingenic_config_pin(jzpc, pin, JZ4770_GPIO_PAT0, high);
21562156
else
21572157
ingenic_config_pin(jzpc, pin, JZ4740_GPIO_DATA, high);
21582158
}

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