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powerpc: Add CPU feature bits for TM bug workarounds on POWER9 v2.2
This adds a CPU feature bit which is set for POWER9 "Nimbus" DD2.2 processors which will be used to enable the hypervisor to assist hardware with the handling of checkpointed register values while the CPU is in suspend state, in order to work around hardware bugs. The hardware assistance for these workarounds introduced a new hardware bug relating to the XER[SO] bit. We add a separate feature bit for this bug in case future chips fix it while still requiring the hypervisor assistance with suspend state. When the dt_cpu_ftrs subsystem is in use, the software assistance can be enabled using a "tm-suspend-hypervisor-assist" node in the device tree, and a "tm-suspend-xer-so-bug" node enables the workarounds for the XER[SO] bug. In the absence of such nodes, a quirk enables both for POWER9 "Nimbus" DD2.2 processors. Signed-off-by: Paul Mackerras <[email protected]> Signed-off-by: Michael Ellerman <[email protected]>
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arch/powerpc/include/asm/cputable.h

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -213,6 +213,8 @@ static inline void cpu_feature_keys_init(void) { }
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#define CPU_FTR_PMAO_BUG LONG_ASM_CONST(0x0000020000000000)
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#define CPU_FTR_POWER9_DD1 LONG_ASM_CONST(0x0000040000000000)
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#define CPU_FTR_POWER9_DD2_1 LONG_ASM_CONST(0x0000080000000000)
216+
#define CPU_FTR_P9_TM_HV_ASSIST LONG_ASM_CONST(0x0000100000000000)
217+
#define CPU_FTR_P9_TM_XER_SO_BUG LONG_ASM_CONST(0x0000200000000000)
216218

217219
#ifndef __ASSEMBLY__
218220

@@ -469,6 +471,8 @@ static inline void cpu_feature_keys_init(void) { }
469471
(~CPU_FTR_SAO))
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#define CPU_FTRS_POWER9_DD2_0 CPU_FTRS_POWER9
471473
#define CPU_FTRS_POWER9_DD2_1 (CPU_FTRS_POWER9 | CPU_FTR_POWER9_DD2_1)
474+
#define CPU_FTRS_POWER9_DD2_2 (CPU_FTRS_POWER9 | CPU_FTR_P9_TM_HV_ASSIST | \
475+
CPU_FTR_P9_TM_XER_SO_BUG)
472476
#define CPU_FTRS_CELL (CPU_FTR_LWSYNC | \
473477
CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
474478
CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \
@@ -488,7 +492,8 @@ static inline void cpu_feature_keys_init(void) { }
488492
CPU_FTRS_POWER6 | CPU_FTRS_POWER7 | CPU_FTRS_POWER8E | \
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CPU_FTRS_POWER8 | CPU_FTRS_POWER8_DD1 | CPU_FTRS_CELL | \
490494
CPU_FTRS_PA6T | CPU_FTR_VSX | CPU_FTRS_POWER9 | \
491-
CPU_FTRS_POWER9_DD1 | CPU_FTRS_POWER9_DD2_1)
495+
CPU_FTRS_POWER9_DD1 | CPU_FTRS_POWER9_DD2_1 | \
496+
CPU_FTRS_POWER9_DD2_2)
492497
#endif
493498
#else
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enum {

arch/powerpc/kernel/cputable.c

Lines changed: 22 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -553,11 +553,31 @@ static struct cpu_spec __initdata cpu_specs[] = {
553553
.machine_check_early = __machine_check_early_realmode_p9,
554554
.platform = "power9",
555555
},
556-
{ /* Power9 DD 2.1 or later (see DD2.0 above) */
556+
{ /* Power9 DD 2.1 */
557+
.pvr_mask = 0xffffefff,
558+
.pvr_value = 0x004e0201,
559+
.cpu_name = "POWER9 (raw)",
560+
.cpu_features = CPU_FTRS_POWER9_DD2_1,
561+
.cpu_user_features = COMMON_USER_POWER9,
562+
.cpu_user_features2 = COMMON_USER2_POWER9,
563+
.mmu_features = MMU_FTRS_POWER9,
564+
.icache_bsize = 128,
565+
.dcache_bsize = 128,
566+
.num_pmcs = 6,
567+
.pmc_type = PPC_PMC_IBM,
568+
.oprofile_cpu_type = "ppc64/power9",
569+
.oprofile_type = PPC_OPROFILE_INVALID,
570+
.cpu_setup = __setup_cpu_power9,
571+
.cpu_restore = __restore_cpu_power9,
572+
.flush_tlb = __flush_tlb_power9,
573+
.machine_check_early = __machine_check_early_realmode_p9,
574+
.platform = "power9",
575+
},
576+
{ /* Power9 DD2.2 or later */
557577
.pvr_mask = 0xffff0000,
558578
.pvr_value = 0x004e0000,
559579
.cpu_name = "POWER9 (raw)",
560-
.cpu_features = CPU_FTRS_POWER9_DD2_1,
580+
.cpu_features = CPU_FTRS_POWER9_DD2_2,
561581
.cpu_user_features = COMMON_USER_POWER9,
562582
.cpu_user_features2 = COMMON_USER2_POWER9,
563583
.mmu_features = MMU_FTRS_POWER9,

arch/powerpc/kernel/dt_cpu_ftrs.c

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -589,6 +589,8 @@ static struct dt_cpu_feature_match __initdata
589589
{"virtual-page-class-key-protection", feat_enable, 0},
590590
{"transactional-memory", feat_enable_tm, CPU_FTR_TM},
591591
{"transactional-memory-v3", feat_enable_tm, 0},
592+
{"tm-suspend-hypervisor-assist", feat_enable, CPU_FTR_P9_TM_HV_ASSIST},
593+
{"tm-suspend-xer-so-bug", feat_enable, CPU_FTR_P9_TM_XER_SO_BUG},
592594
{"idle-nap", feat_enable_idle_nap, 0},
593595
{"alignment-interrupt-dsisr", feat_enable_align_dsisr, 0},
594596
{"idle-stop", feat_enable_idle_stop, 0},
@@ -708,6 +710,9 @@ static __init void cpufeatures_cpu_quirks(void)
708710
cur_cpu_spec->cpu_features |= CPU_FTR_POWER9_DD1;
709711
else if ((version & 0xffffefff) == 0x004e0201)
710712
cur_cpu_spec->cpu_features |= CPU_FTR_POWER9_DD2_1;
713+
else if ((version & 0xffffefff) == 0x004e0202)
714+
cur_cpu_spec->cpu_features |= CPU_FTR_P9_TM_HV_ASSIST |
715+
CPU_FTR_P9_TM_XER_SO_BUG;
711716
}
712717

713718
static void __init cpufeatures_setup_finished(void)

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