@@ -528,75 +528,62 @@ static int aic32x4_set_bias_level(struct snd_soc_codec *codec,
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enum snd_soc_bias_level level )
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{
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struct aic32x4_priv * aic32x4 = snd_soc_codec_get_drvdata (codec );
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- u8 value ;
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switch (level ) {
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case SND_SOC_BIAS_ON :
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if (aic32x4 -> master ) {
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/* Switch on PLL */
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- value = snd_soc_read (codec , AIC32X4_PLLPR );
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- snd_soc_write (codec , AIC32X4_PLLPR ,
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- (value | AIC32X4_PLLEN ));
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+ snd_soc_update_bits (codec , AIC32X4_PLLPR ,
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+ AIC32X4_PLLEN , AIC32X4_PLLEN );
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/* Switch on NDAC Divider */
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- value = snd_soc_read (codec , AIC32X4_NDAC );
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- snd_soc_write (codec , AIC32X4_NDAC ,
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- value | AIC32X4_NDACEN );
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+ snd_soc_update_bits (codec , AIC32X4_NDAC ,
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+ AIC32X4_NDACEN , AIC32X4_NDACEN );
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/* Switch on MDAC Divider */
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- value = snd_soc_read (codec , AIC32X4_MDAC );
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- snd_soc_write (codec , AIC32X4_MDAC ,
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- value | AIC32X4_MDACEN );
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+ snd_soc_update_bits (codec , AIC32X4_MDAC ,
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+ AIC32X4_MDACEN , AIC32X4_MDACEN );
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/* Switch on NADC Divider */
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- value = snd_soc_read (codec , AIC32X4_NADC );
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- snd_soc_write (codec , AIC32X4_NADC ,
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- value | AIC32X4_MDACEN );
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+ snd_soc_update_bits (codec , AIC32X4_NADC ,
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+ AIC32X4_NADCEN , AIC32X4_NADCEN );
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/* Switch on MADC Divider */
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- value = snd_soc_read (codec , AIC32X4_MADC );
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- snd_soc_write (codec , AIC32X4_MADC ,
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- value | AIC32X4_MDACEN );
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+ snd_soc_update_bits (codec , AIC32X4_MADC ,
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+ AIC32X4_MADCEN , AIC32X4_MADCEN );
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/* Switch on BCLK_N Divider */
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- value = snd_soc_read (codec , AIC32X4_BCLKN );
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- snd_soc_write (codec , AIC32X4_BCLKN ,
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- value | AIC32X4_BCLKEN );
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+ snd_soc_update_bits (codec , AIC32X4_BCLKN ,
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+ AIC32X4_BCLKEN , AIC32X4_BCLKEN );
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}
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break ;
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case SND_SOC_BIAS_PREPARE :
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break ;
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case SND_SOC_BIAS_STANDBY :
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if (aic32x4 -> master ) {
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/* Switch off PLL */
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- value = snd_soc_read (codec , AIC32X4_PLLPR );
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- snd_soc_write (codec , AIC32X4_PLLPR ,
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- (value & ~AIC32X4_PLLEN ));
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+ snd_soc_update_bits (codec , AIC32X4_PLLPR ,
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+ AIC32X4_PLLEN , 0 );
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/* Switch off NDAC Divider */
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- value = snd_soc_read (codec , AIC32X4_NDAC );
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- snd_soc_write (codec , AIC32X4_NDAC ,
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- value & ~AIC32X4_NDACEN );
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+ snd_soc_update_bits (codec , AIC32X4_NDAC ,
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+ AIC32X4_NDACEN , 0 );
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/* Switch off MDAC Divider */
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- value = snd_soc_read (codec , AIC32X4_MDAC );
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- snd_soc_write (codec , AIC32X4_MDAC ,
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- value & ~AIC32X4_MDACEN );
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+ snd_soc_update_bits (codec , AIC32X4_MDAC ,
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+ AIC32X4_MDACEN , 0 );
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/* Switch off NADC Divider */
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- value = snd_soc_read (codec , AIC32X4_NADC );
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- snd_soc_write (codec , AIC32X4_NADC ,
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- value & ~AIC32X4_NDACEN );
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+ snd_soc_update_bits (codec , AIC32X4_NADC ,
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+ AIC32X4_NADCEN , 0 );
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/* Switch off MADC Divider */
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- value = snd_soc_read (codec , AIC32X4_MADC );
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- snd_soc_write (codec , AIC32X4_MADC ,
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- value & ~AIC32X4_MDACEN );
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- value = snd_soc_read (codec , AIC32X4_BCLKN );
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+ snd_soc_update_bits (codec , AIC32X4_MADC ,
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+ AIC32X4_MADCEN , 0 );
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/* Switch off BCLK_N Divider */
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- snd_soc_write (codec , AIC32X4_BCLKN ,
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- value & ~ AIC32X4_BCLKEN );
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+ snd_soc_update_bits (codec , AIC32X4_BCLKN ,
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+ AIC32X4_BCLKEN , 0 );
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}
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break ;
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case SND_SOC_BIAS_OFF :
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