x86/microcode/intel: Issue the revision updated message only on the BSP

... in order to not pollute dmesg with a line for each updated microcode
engine.

Signed-off-by: Borislav Petkov <[email protected]>
Cc: Ashok Raj <[email protected]>
Cc: Boris Ostrovsky <[email protected]>
Cc: "H. Peter Anvin" <[email protected]>
Cc: Ingo Molnar <[email protected]>
Cc: Jon Grimm <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: Mihai Carabas <[email protected]>
Cc: [email protected]
Cc: Thomas Gleixner <[email protected]>
Cc: Tom Lendacky <[email protected]>
Cc: x86-ml <[email protected]>

Orabug: 30297345
JIRA: LINUX-1612

Patch has not been committed to any tree yet so (1) there is no SHA1 to
reference and (2) commit message will probably change.

Signed-off-by: Mihai Carabas <[email protected]>
Reviewed-by: Boris Ostrovsky <[email protected]>
Signed-off-by: Somasundaram Krishnasamy <[email protected]>

Author: suryasaimadhu

arch/x86/kernel/cpu/microcode/intel.c

@@ -796,6 +796,7 @@ static enum ucode_state apply_microcode_intel(int cpu)
 {
 	struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
 	struct cpuinfo_x86 *c = &cpu_data(cpu);
+	bool bsp = c->cpu_index == boot_cpu_data.cpu_index;
 	struct microcode_intel *mc;
 	enum ucode_state ret;
 	static int prev_rev;
@@ -841,7 +842,7 @@ static enum ucode_state apply_microcode_intel(int cpu)
 		return UCODE_ERROR;
 	}
 
-	if (rev != prev_rev) {
+	if (bsp && rev != prev_rev) {
 		pr_info("updated to revision 0x%x, date = %04x-%02x-%02x\n",
 			rev,
 			mc->hdr.date & 0xffff,
@@ -857,7 +858,7 @@ static enum ucode_state apply_microcode_intel(int cpu)
 	c->microcode	 = rev;
 
 	/* Update boot_cpu_data's revision too, if we're on the BSP: */
-	if (c->cpu_index == boot_cpu_data.cpu_index)
+	if (bsp)
 		boot_cpu_data.microcode = rev;
 
 	/* Whitelist/blacklist speculation control features. */