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Merge remote-tracking branches 'asoc/topic/max98504', 'asoc/topic/max9867', 'asoc/topic/max9877', 'asoc/topic/mtk' and 'asoc/topic/nau8825' into asoc-next
6 parents abc026f + 51ded0f + 0ac4aeb + 49220e9 + 97e1145 + 308e3e0 commit c704f4e

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‎Documentation/devicetree/bindings/sound/max98504.txt

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Maxim MAX98504 class D mono speaker amplifier
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This device supports I2C control interface and an IRQ output signal. It features
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a PCM and PDM digital audio interface (DAI) and a differential analog input.
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Required properties:
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- compatible : "maxim,max98504"
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- reg : should contain the I2C slave device address
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- DVDD-supply, DIOVDD-supply, PVDD-supply: power supplies for the device,
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as covered in ../regulator/regulator.txt
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- interrupts : should specify the interrupt line the device is connected to,
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as described in ../interrupt-controller/interrupts.txt
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Optional properties:
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- maxim,brownout-threshold - the PVDD brownout threshold, the value must be
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from 0, 1...21 range, corresponding to 2.6V, 2.65V...3.65V voltage range
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- maxim,brownout-attenuation - the brownout attenuation to the speaker gain
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applied during the "attack hold" and "timed hold" phase, the value must be
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from 0...6 (dB) range
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- maxim,brownout-attack-hold-ms - the brownout attack hold phase time in ms,
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0...255 (VBATBROWN_ATTK_HOLD, register 0x0018)
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- maxim,brownout-timed-hold-ms - the brownout timed hold phase time in ms,
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0...255 (VBATBROWN_TIME_HOLD, register 0x0019)
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- maxim,brownout-release-rate-ms - the brownout release phase step time in ms,
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0...255 (VBATBROWN_RELEASE, register 0x001A)
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The default value when the above properties are not specified is 0,
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the maxim,brownout-threshold property must be specified to actually enable
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the PVDD brownout protection.
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Example:
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max98504@31 {
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compatible = "maxim,max98504";
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reg = <0x31>;
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interrupt-parent = <&gpio_bank_0>;
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interrupts = <2 0>;
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DVDD-supply = <&regulator>;
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DIOVDD-supply = <&regulator>;
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PVDD-supply = <&regulator>;
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};

‎Documentation/devicetree/bindings/sound/mt2701-afe-pcm.txt

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Mediatek AFE PCM controller for mt2701
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Required properties:
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- compatible = "mediatek,mt2701-audio";
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- reg: register location and size
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- interrupts: Should contain AFE interrupt
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- clock-names: should have these clock names:
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"infra_sys_audio_clk",
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"top_audio_mux1_sel",
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"top_audio_mux2_sel",
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"top_audio_mux1_div",
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"top_audio_mux2_div",
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"top_audio_48k_timing",
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"top_audio_44k_timing",
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"top_audpll_mux_sel",
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"top_apll_sel",
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"top_aud1_pll_98M",
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"top_aud2_pll_90M",
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"top_hadds2_pll_98M",
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"top_hadds2_pll_294M",
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"top_audpll",
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"top_audpll_d4",
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"top_audpll_d8",
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"top_audpll_d16",
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"top_audpll_d24",
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"top_audintbus_sel",
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"clk_26m",
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"top_syspll1_d4",
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"top_aud_k1_src_sel",
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"top_aud_k2_src_sel",
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"top_aud_k3_src_sel",
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"top_aud_k4_src_sel",
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"top_aud_k5_src_sel",
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"top_aud_k6_src_sel",
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"top_aud_k1_src_div",
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"top_aud_k2_src_div",
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"top_aud_k3_src_div",
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"top_aud_k4_src_div",
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"top_aud_k5_src_div",
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"top_aud_k6_src_div",
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"top_aud_i2s1_mclk",
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"top_aud_i2s2_mclk",
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"top_aud_i2s3_mclk",
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"top_aud_i2s4_mclk",
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"top_aud_i2s5_mclk",
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"top_aud_i2s6_mclk",
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"top_asm_m_sel",
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"top_asm_h_sel",
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"top_univpll2_d4",
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"top_univpll2_d2",
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"top_syspll_d5";
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Example:
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afe: mt2701-afe-pcm@11220000 {
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compatible = "mediatek,mt2701-audio";
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reg = <0 0x11220000 0 0x2000>,
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<0 0x112A0000 0 0x20000>;
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interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_LOW>,
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<GIC_SPI 132 IRQ_TYPE_LEVEL_LOW>;
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clocks = <&infracfg CLK_INFRA_AUDIO>,
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<&topckgen CLK_TOP_AUD_MUX1_SEL>,
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<&topckgen CLK_TOP_AUD_MUX2_SEL>,
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<&topckgen CLK_TOP_AUD_MUX1_DIV>,
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<&topckgen CLK_TOP_AUD_MUX2_DIV>,
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<&topckgen CLK_TOP_AUD_48K_TIMING>,
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<&topckgen CLK_TOP_AUD_44K_TIMING>,
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<&topckgen CLK_TOP_AUDPLL_MUX_SEL>,
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<&topckgen CLK_TOP_APLL_SEL>,
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<&topckgen CLK_TOP_AUD1PLL_98M>,
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<&topckgen CLK_TOP_AUD2PLL_90M>,
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<&topckgen CLK_TOP_HADDS2PLL_98M>,
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<&topckgen CLK_TOP_HADDS2PLL_294M>,
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<&topckgen CLK_TOP_AUDPLL>,
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<&topckgen CLK_TOP_AUDPLL_D4>,
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<&topckgen CLK_TOP_AUDPLL_D8>,
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<&topckgen CLK_TOP_AUDPLL_D16>,
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<&topckgen CLK_TOP_AUDPLL_D24>,
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<&topckgen CLK_TOP_AUDINTBUS_SEL>,
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<&clk26m>,
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<&topckgen CLK_TOP_SYSPLL1_D4>,
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<&topckgen CLK_TOP_AUD_K1_SRC_SEL>,
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<&topckgen CLK_TOP_AUD_K2_SRC_SEL>,
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<&topckgen CLK_TOP_AUD_K3_SRC_SEL>,
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<&topckgen CLK_TOP_AUD_K4_SRC_SEL>,
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<&topckgen CLK_TOP_AUD_K5_SRC_SEL>,
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<&topckgen CLK_TOP_AUD_K6_SRC_SEL>,
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<&topckgen CLK_TOP_AUD_K1_SRC_DIV>,
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<&topckgen CLK_TOP_AUD_K2_SRC_DIV>,
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<&topckgen CLK_TOP_AUD_K3_SRC_DIV>,
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<&topckgen CLK_TOP_AUD_K4_SRC_DIV>,
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<&topckgen CLK_TOP_AUD_K5_SRC_DIV>,
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<&topckgen CLK_TOP_AUD_K6_SRC_DIV>,
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<&topckgen CLK_TOP_AUD_I2S1_MCLK>,
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<&topckgen CLK_TOP_AUD_I2S2_MCLK>,
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<&topckgen CLK_TOP_AUD_I2S3_MCLK>,
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<&topckgen CLK_TOP_AUD_I2S4_MCLK>,
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<&topckgen CLK_TOP_AUD_I2S5_MCLK>,
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<&topckgen CLK_TOP_AUD_I2S6_MCLK>,
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<&topckgen CLK_TOP_ASM_M_SEL>,
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<&topckgen CLK_TOP_ASM_H_SEL>,
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<&topckgen CLK_TOP_UNIVPLL2_D4>,
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<&topckgen CLK_TOP_UNIVPLL2_D2>,
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<&topckgen CLK_TOP_SYSPLL_D5>;
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clock-names = "infra_sys_audio_clk",
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"top_audio_mux1_sel",
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"top_audio_mux2_sel",
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"top_audio_mux1_div",
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"top_audio_mux2_div",
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"top_audio_48k_timing",
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"top_audio_44k_timing",
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"top_audpll_mux_sel",
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"top_apll_sel",
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"top_aud1_pll_98M",
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"top_aud2_pll_90M",
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"top_hadds2_pll_98M",
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"top_hadds2_pll_294M",
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"top_audpll",
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"top_audpll_d4",
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"top_audpll_d8",
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"top_audpll_d16",
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"top_audpll_d24",
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"top_audintbus_sel",
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"clk_26m",
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"top_syspll1_d4",
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"top_aud_k1_src_sel",
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"top_aud_k2_src_sel",
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"top_aud_k3_src_sel",
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"top_aud_k4_src_sel",
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"top_aud_k5_src_sel",
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"top_aud_k6_src_sel",
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"top_aud_k1_src_div",
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"top_aud_k2_src_div",
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"top_aud_k3_src_div",
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"top_aud_k4_src_div",
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"top_aud_k5_src_div",
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"top_aud_k6_src_div",
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"top_aud_i2s1_mclk",
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"top_aud_i2s2_mclk",
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"top_aud_i2s3_mclk",
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"top_aud_i2s4_mclk",
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"top_aud_i2s5_mclk",
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"top_aud_i2s6_mclk",
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"top_asm_m_sel",
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"top_asm_h_sel",
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"top_univpll2_d4",
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"top_univpll2_d2",
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"top_syspll_d5";
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};

‎Documentation/devicetree/bindings/sound/mt2701-cs42448.txt

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MT2701 with CS42448 CODEC
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Required properties:
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- compatible: "mediatek,mt2701-cs42448-machine"
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- mediatek,platform: the phandle of MT2701 ASoC platform
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- audio-routing: a list of the connections between audio
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- mediatek,audio-codec: the phandles of cs42448 codec
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- mediatek,audio-codec-bt-mrg the phandles of bt-sco dummy codec
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- pinctrl-names: Should contain only one value - "default"
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- pinctrl-0: Should specify pin control groups used for this controller.
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- i2s1-in-sel-gpio1, i2s1-in-sel-gpio2: Should specify two gpio pins to
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control I2S1-in mux.
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Example:
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sound:sound {
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compatible = "mediatek,mt2701-cs42448-machine";
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mediatek,platform = <&afe>;
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/* CS42448 Machine name */
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audio-routing =
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"Line Out Jack", "AOUT1L",
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"Line Out Jack", "AOUT1R",
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"Line Out Jack", "AOUT2L",
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"Line Out Jack", "AOUT2R",
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"Line Out Jack", "AOUT3L",
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"Line Out Jack", "AOUT3R",
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"Line Out Jack", "AOUT4L",
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"Line Out Jack", "AOUT4R",
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"AIN1L", "AMIC",
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"AIN1R", "AMIC",
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"AIN2L", "Tuner In",
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"AIN2R", "Tuner In",
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"AIN3L", "Satellite Tuner In",
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"AIN3R", "Satellite Tuner In",
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"AIN3L", "AUX In",
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"AIN3R", "AUX In";
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mediatek,audio-codec = <&cs42448>;
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mediatek,audio-codec-bt-mrg = <&bt_sco_codec>;
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pinctrl-names = "default";
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pinctrl-0 = <&aud_pins_default>;
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i2s1-in-sel-gpio1 = <&pio 53 0>;
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i2s1-in-sel-gpio2 = <&pio 54 0>;
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};

‎Documentation/devicetree/bindings/sound/mt8173-rt5650.txt

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MT8173 with RT5650 CODECS
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MT8173 with RT5650 CODECS and HDMI via I2S
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Required properties:
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- compatible : "mediatek,mt8173-rt5650"
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- mediatek,audio-codec: the phandles of rt5650 codecs
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and of the hdmi encoder node
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- mediatek,platform: the phandle of MT8173 ASoC platform
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Optional subnodes:
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<&rt5650 0> : Default setting. Connect rt5650 I2S1 for capture. (dai_name = rt5645-aif1)
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<&rt5650 1> : Connect rt5650 I2S2 for capture. (dai_name = rt5645-aif2)
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- mediatek,mclk: the MCLK source
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0 : external oscillator, MCLK = 12.288M
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1 : internal source from mt8173, MCLK = sampling rate*256
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Example:
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sound {
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compatible = "mediatek,mt8173-rt5650";
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mediatek,audio-codec = <&rt5650>;
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mediatek,audio-codec = <&rt5650 &hdmi0>;
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mediatek,platform = <&afe>;
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mediatek,mclk = <0>;
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codec-capture {
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sound-dai = <&rt5650 1>;
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};

‎sound/soc/codecs/Kconfig

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config SND_SOC_MAX98371
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tristate
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config SND_SOC_MAX98504
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tristate "Maxim MAX98504 speaker amplifier"
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depends on I2C
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config SND_SOC_MAX9867
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tristate
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‎sound/soc/codecs/Makefile

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@@ -213,6 +213,7 @@ snd-soc-wm-hubs-objs := wm_hubs.o
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# Amp
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snd-soc-max9877-objs := max9877.o
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snd-soc-max98504-objs := max98504.o
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snd-soc-tpa6130a2-objs := tpa6130a2.o
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snd-soc-tas2552-objs := tas2552.o
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# Amp
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obj-$(CONFIG_SND_SOC_MAX9877) += snd-soc-max9877.o
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obj-$(CONFIG_SND_SOC_MAX98504) += snd-soc-max98504.o
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obj-$(CONFIG_SND_SOC_TPA6130A2) += snd-soc-tpa6130a2.o

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