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Ganesh Goudardavem330
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cxgb4: add geneve offload support for T6
Add geneve segmentation offload support of T6 cards. Original work by: Santosh Rastapur <[email protected]> Signed-off-by: Ganesh Goudar <[email protected]> Signed-off-by: David S. Miller <[email protected]>
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4 files changed

+63
-24
lines changed

4 files changed

+63
-24
lines changed

drivers/net/ethernet/chelsio/cxgb4/cxgb4.h

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -846,6 +846,8 @@ struct adapter {
846846
int msg_enable;
847847
__be16 vxlan_port;
848848
u8 vxlan_port_cnt;
849+
__be16 geneve_port;
850+
u8 geneve_port_cnt;
849851

850852
struct adapter_params params;
851853
struct cxgb4_virt_res vres;

drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c

Lines changed: 47 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -3020,6 +3020,17 @@ static void cxgb_del_udp_tunnel(struct net_device *netdev,
30203020
adapter->vxlan_port = 0;
30213021
t4_write_reg(adapter, MPS_RX_VXLAN_TYPE_A, 0);
30223022
break;
3023+
case UDP_TUNNEL_TYPE_GENEVE:
3024+
if (!adapter->geneve_port_cnt ||
3025+
adapter->geneve_port != ti->port)
3026+
return; /* Invalid GENEVE destination port */
3027+
3028+
adapter->geneve_port_cnt--;
3029+
if (adapter->geneve_port_cnt)
3030+
return;
3031+
3032+
adapter->geneve_port = 0;
3033+
t4_write_reg(adapter, MPS_RX_GENEVE_TYPE_A, 0);
30233034
default:
30243035
return;
30253036
}
@@ -3055,17 +3066,11 @@ static void cxgb_add_udp_tunnel(struct net_device *netdev,
30553066
u8 match_all_mac[] = { 0, 0, 0, 0, 0, 0 };
30563067
int i, ret;
30573068

3058-
if (chip_ver < CHELSIO_T6)
3069+
if (chip_ver < CHELSIO_T6 || !adapter->rawf_cnt)
30593070
return;
30603071

30613072
switch (ti->type) {
30623073
case UDP_TUNNEL_TYPE_VXLAN:
3063-
/* For T6 fw reserves last 2 entries for
3064-
* storing match all mac filter (config file entry).
3065-
*/
3066-
if (!adapter->rawf_cnt)
3067-
return;
3068-
30693074
/* Callback for adding vxlan port can be called with the same
30703075
* port for both IPv4 and IPv6. We should not disable the
30713076
* offloading when the same port for both protocols is added
@@ -3091,6 +3096,26 @@ static void cxgb_add_udp_tunnel(struct net_device *netdev,
30913096
t4_write_reg(adapter, MPS_RX_VXLAN_TYPE_A,
30923097
VXLAN_V(be16_to_cpu(ti->port)) | VXLAN_EN_F);
30933098
break;
3099+
case UDP_TUNNEL_TYPE_GENEVE:
3100+
if (adapter->geneve_port_cnt &&
3101+
adapter->geneve_port == ti->port) {
3102+
adapter->geneve_port_cnt++;
3103+
return;
3104+
}
3105+
3106+
/* We will support only one GENEVE port */
3107+
if (adapter->geneve_port_cnt) {
3108+
netdev_info(netdev, "UDP port %d already offloaded, not adding port %d\n",
3109+
be16_to_cpu(adapter->geneve_port),
3110+
be16_to_cpu(ti->port));
3111+
return;
3112+
}
3113+
3114+
adapter->geneve_port = ti->port;
3115+
adapter->geneve_port_cnt = 1;
3116+
3117+
t4_write_reg(adapter, MPS_RX_GENEVE_TYPE_A,
3118+
GENEVE_V(be16_to_cpu(ti->port)) | GENEVE_EN_F);
30943119
default:
30953120
return;
30963121
}
@@ -3101,24 +3126,22 @@ static void cxgb_add_udp_tunnel(struct net_device *netdev,
31013126
* we will remove this 'match all' entry and fallback to adding
31023127
* exact match filters.
31033128
*/
3104-
if (adapter->rawf_cnt) {
3105-
for_each_port(adapter, i) {
3106-
pi = adap2pinfo(adapter, i);
3107-
3108-
ret = t4_alloc_raw_mac_filt(adapter, pi->viid,
3109-
match_all_mac,
3110-
match_all_mac,
3111-
adapter->rawf_start +
3112-
pi->port_id,
3113-
1, pi->port_id, true);
3114-
if (ret < 0) {
3115-
netdev_info(netdev, "Failed to allocate a mac filter entry, not adding port %d\n",
3116-
be16_to_cpu(ti->port));
3117-
cxgb_del_udp_tunnel(netdev, ti);
3118-
return;
3119-
}
3120-
atomic_inc(&adapter->mps_encap[ret].refcnt);
3129+
for_each_port(adapter, i) {
3130+
pi = adap2pinfo(adapter, i);
3131+
3132+
ret = t4_alloc_raw_mac_filt(adapter, pi->viid,
3133+
match_all_mac,
3134+
match_all_mac,
3135+
adapter->rawf_start +
3136+
pi->port_id,
3137+
1, pi->port_id, true);
3138+
if (ret < 0) {
3139+
netdev_info(netdev, "Failed to allocate a mac filter entry, not adding port %d\n",
3140+
be16_to_cpu(ti->port));
3141+
cxgb_del_udp_tunnel(netdev, ti);
3142+
return;
31213143
}
3144+
atomic_inc(&adapter->mps_encap[ret].refcnt);
31223145
}
31233146
}
31243147

drivers/net/ethernet/chelsio/cxgb4/sge.c

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1199,6 +1199,8 @@ enum cpl_tx_tnl_lso_type cxgb_encap_offload_supported(struct sk_buff *skb)
11991199
case IPPROTO_UDP:
12001200
if (adapter->vxlan_port == udp_hdr(skb)->dest)
12011201
tnl_type = TX_TNL_TYPE_VXLAN;
1202+
else if (adapter->geneve_port == udp_hdr(skb)->dest)
1203+
tnl_type = TX_TNL_TYPE_GENEVE;
12021204
break;
12031205
default:
12041206
return tnl_type;
@@ -1238,6 +1240,7 @@ static inline void t6_fill_tnl_lso(struct sk_buff *skb,
12381240

12391241
switch (tnl_type) {
12401242
case TX_TNL_TYPE_VXLAN:
1243+
case TX_TNL_TYPE_GENEVE:
12411244
tnl_lso->UdpLenSetOut_to_TnlHdrLen =
12421245
htons(CPL_TX_TNL_LSO_UDPCHKCLROUT_F |
12431246
CPL_TX_TNL_LSO_UDPLENSETOUT_F);

drivers/net/ethernet/chelsio/cxgb4/t4_regs.h

Lines changed: 11 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2522,6 +2522,17 @@
25222522
#define VXLAN_V(x) ((x) << VXLAN_S)
25232523
#define VXLAN_G(x) (((x) >> VXLAN_S) & VXLAN_M)
25242524

2525+
#define MPS_RX_GENEVE_TYPE_A 0x11238
2526+
2527+
#define GENEVE_EN_S 16
2528+
#define GENEVE_EN_V(x) ((x) << GENEVE_EN_S)
2529+
#define GENEVE_EN_F GENEVE_EN_V(1U)
2530+
2531+
#define GENEVE_S 0
2532+
#define GENEVE_M 0xffffU
2533+
#define GENEVE_V(x) ((x) << GENEVE_S)
2534+
#define GENEVE_G(x) (((x) >> GENEVE_S) & GENEVE_M)
2535+
25252536
#define MPS_CLS_TCAM_Y_L_A 0xf000
25262537
#define MPS_CLS_TCAM_DATA0_A 0xf000
25272538
#define MPS_CLS_TCAM_DATA1_A 0xf004

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