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Marc Zyngier
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ARM: KVM: Add CP15 save/restore code
Concert the CP15 save/restore code to C. Reviewed-by: Christoffer Dall <[email protected]> Signed-off-by: Marc Zyngier <[email protected]>
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‎arch/arm/kvm/hyp/Makefile

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#
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obj-$(CONFIG_KVM_ARM_HOST) += tlb.o
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obj-$(CONFIG_KVM_ARM_HOST) += cp15-sr.o

‎arch/arm/kvm/hyp/cp15-sr.c

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/*
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* Original code:
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* Copyright (C) 2012 - Virtual Open Systems and Columbia University
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* Author: Christoffer Dall <[email protected]>
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*
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* Mostly rewritten in C by Marc Zyngier <[email protected]>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "hyp.h"
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static u64 *cp15_64(struct kvm_cpu_context *ctxt, int idx)
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{
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return (u64 *)(ctxt->cp15 + idx);
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}
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void __hyp_text __sysreg_save_state(struct kvm_cpu_context *ctxt)
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{
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ctxt->cp15[c0_MPIDR] = read_sysreg(VMPIDR);
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ctxt->cp15[c0_CSSELR] = read_sysreg(CSSELR);
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ctxt->cp15[c1_SCTLR] = read_sysreg(SCTLR);
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ctxt->cp15[c1_CPACR] = read_sysreg(CPACR);
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*cp15_64(ctxt, c2_TTBR0) = read_sysreg(TTBR0);
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*cp15_64(ctxt, c2_TTBR1) = read_sysreg(TTBR1);
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ctxt->cp15[c2_TTBCR] = read_sysreg(TTBCR);
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ctxt->cp15[c3_DACR] = read_sysreg(DACR);
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ctxt->cp15[c5_DFSR] = read_sysreg(DFSR);
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ctxt->cp15[c5_IFSR] = read_sysreg(IFSR);
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ctxt->cp15[c5_ADFSR] = read_sysreg(ADFSR);
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ctxt->cp15[c5_AIFSR] = read_sysreg(AIFSR);
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ctxt->cp15[c6_DFAR] = read_sysreg(DFAR);
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ctxt->cp15[c6_IFAR] = read_sysreg(IFAR);
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*cp15_64(ctxt, c7_PAR) = read_sysreg(PAR);
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ctxt->cp15[c10_PRRR] = read_sysreg(PRRR);
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ctxt->cp15[c10_NMRR] = read_sysreg(NMRR);
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ctxt->cp15[c10_AMAIR0] = read_sysreg(AMAIR0);
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ctxt->cp15[c10_AMAIR1] = read_sysreg(AMAIR1);
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ctxt->cp15[c12_VBAR] = read_sysreg(VBAR);
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ctxt->cp15[c13_CID] = read_sysreg(CID);
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ctxt->cp15[c13_TID_URW] = read_sysreg(TID_URW);
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ctxt->cp15[c13_TID_URO] = read_sysreg(TID_URO);
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ctxt->cp15[c13_TID_PRIV] = read_sysreg(TID_PRIV);
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ctxt->cp15[c14_CNTKCTL] = read_sysreg(CNTKCTL);
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}
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void __hyp_text __sysreg_restore_state(struct kvm_cpu_context *ctxt)
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{
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write_sysreg(ctxt->cp15[c0_MPIDR], VMPIDR);
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write_sysreg(ctxt->cp15[c0_CSSELR], CSSELR);
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write_sysreg(ctxt->cp15[c1_SCTLR], SCTLR);
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write_sysreg(ctxt->cp15[c1_CPACR], CPACR);
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write_sysreg(*cp15_64(ctxt, c2_TTBR0), TTBR0);
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write_sysreg(*cp15_64(ctxt, c2_TTBR1), TTBR1);
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write_sysreg(ctxt->cp15[c2_TTBCR], TTBCR);
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write_sysreg(ctxt->cp15[c3_DACR], DACR);
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write_sysreg(ctxt->cp15[c5_DFSR], DFSR);
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write_sysreg(ctxt->cp15[c5_IFSR], IFSR);
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write_sysreg(ctxt->cp15[c5_ADFSR], ADFSR);
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write_sysreg(ctxt->cp15[c5_AIFSR], AIFSR);
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write_sysreg(ctxt->cp15[c6_DFAR], DFAR);
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write_sysreg(ctxt->cp15[c6_IFAR], IFAR);
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write_sysreg(*cp15_64(ctxt, c7_PAR), PAR);
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write_sysreg(ctxt->cp15[c10_PRRR], PRRR);
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write_sysreg(ctxt->cp15[c10_NMRR], NMRR);
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write_sysreg(ctxt->cp15[c10_AMAIR0], AMAIR0);
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write_sysreg(ctxt->cp15[c10_AMAIR1], AMAIR1);
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write_sysreg(ctxt->cp15[c12_VBAR], VBAR);
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write_sysreg(ctxt->cp15[c13_CID], CID);
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write_sysreg(ctxt->cp15[c13_TID_URW], TID_URW);
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write_sysreg(ctxt->cp15[c13_TID_URO], TID_URO);
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write_sysreg(ctxt->cp15[c13_TID_PRIV], TID_PRIV);
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write_sysreg(ctxt->cp15[c14_CNTKCTL], CNTKCTL);
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}

‎arch/arm/kvm/hyp/hyp.h

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})
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#define read_sysreg(...) __read_sysreg(__VA_ARGS__)
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#define TTBR0 __ACCESS_CP15_64(0, c2)
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#define TTBR1 __ACCESS_CP15_64(1, c2)
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#define VTTBR __ACCESS_CP15_64(6, c2)
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#define PAR __ACCESS_CP15_64(0, c7)
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#define CSSELR __ACCESS_CP15(c0, 2, c0, 0)
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#define VMPIDR __ACCESS_CP15(c0, 4, c0, 5)
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#define SCTLR __ACCESS_CP15(c1, 0, c0, 0)
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#define CPACR __ACCESS_CP15(c1, 0, c0, 2)
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#define TTBCR __ACCESS_CP15(c2, 0, c0, 2)
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#define DACR __ACCESS_CP15(c3, 0, c0, 0)
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#define DFSR __ACCESS_CP15(c5, 0, c0, 0)
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#define IFSR __ACCESS_CP15(c5, 0, c0, 1)
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#define ADFSR __ACCESS_CP15(c5, 0, c1, 0)
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#define AIFSR __ACCESS_CP15(c5, 0, c1, 1)
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#define DFAR __ACCESS_CP15(c6, 0, c0, 0)
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#define IFAR __ACCESS_CP15(c6, 0, c0, 2)
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#define ICIALLUIS __ACCESS_CP15(c7, 0, c1, 0)
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#define TLBIALLIS __ACCESS_CP15(c8, 0, c3, 0)
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#define TLBIALLNSNHIS __ACCESS_CP15(c8, 4, c3, 4)
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#define PRRR __ACCESS_CP15(c10, 0, c2, 0)
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#define NMRR __ACCESS_CP15(c10, 0, c2, 1)
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#define AMAIR0 __ACCESS_CP15(c10, 0, c3, 0)
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#define AMAIR1 __ACCESS_CP15(c10, 0, c3, 1)
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#define VBAR __ACCESS_CP15(c12, 0, c0, 0)
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#define CID __ACCESS_CP15(c13, 0, c0, 1)
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#define TID_URW __ACCESS_CP15(c13, 0, c0, 2)
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#define TID_URO __ACCESS_CP15(c13, 0, c0, 3)
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#define TID_PRIV __ACCESS_CP15(c13, 0, c0, 4)
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#define CNTKCTL __ACCESS_CP15(c14, 0, c1, 0)
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void __sysreg_save_state(struct kvm_cpu_context *ctxt);
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void __sysreg_restore_state(struct kvm_cpu_context *ctxt);
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#endif /* __ARM_KVM_HYP_H__ */

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