@@ -183,7 +183,7 @@ static const struct sh_dmae_slave_config sh7757_dmae1_slaves[] = {
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{
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.slave_id = SHDMA_SLAVE_SCIF2_RX ,
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.addr = 0x1f4b0014 ,
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- .chcr = SM_INC | 0x800 | 0x40000000 |
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+ .chcr = DM_INC | 0x800 | 0x40000000 |
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TS_INDEX2VAL (XMIT_SZ_8BIT ),
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.mid_rid = 0x22 ,
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},
@@ -197,7 +197,7 @@ static const struct sh_dmae_slave_config sh7757_dmae1_slaves[] = {
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{
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.slave_id = SHDMA_SLAVE_SCIF3_RX ,
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.addr = 0x1f4c0014 ,
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- .chcr = SM_INC | 0x800 | 0x40000000 |
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+ .chcr = DM_INC | 0x800 | 0x40000000 |
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TS_INDEX2VAL (XMIT_SZ_8BIT ),
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.mid_rid = 0x2a ,
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},
@@ -211,7 +211,7 @@ static const struct sh_dmae_slave_config sh7757_dmae1_slaves[] = {
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{
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.slave_id = SHDMA_SLAVE_SCIF4_RX ,
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.addr = 0x1f4d0014 ,
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- .chcr = SM_INC | 0x800 | 0x40000000 |
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+ .chcr = DM_INC | 0x800 | 0x40000000 |
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TS_INDEX2VAL (XMIT_SZ_8BIT ),
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.mid_rid = 0x42 ,
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},
@@ -228,7 +228,7 @@ static const struct sh_dmae_slave_config sh7757_dmae2_slaves[] = {
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{
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.slave_id = SHDMA_SLAVE_RIIC0_RX ,
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.addr = 0x1e500013 ,
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- .chcr = SM_INC | 0x800 | 0x40000000 |
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+ .chcr = DM_INC | 0x800 | 0x40000000 |
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TS_INDEX2VAL (XMIT_SZ_8BIT ),
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.mid_rid = 0x22 ,
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},
@@ -242,7 +242,7 @@ static const struct sh_dmae_slave_config sh7757_dmae2_slaves[] = {
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{
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.slave_id = SHDMA_SLAVE_RIIC1_RX ,
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.addr = 0x1e510013 ,
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- .chcr = SM_INC | 0x800 | 0x40000000 |
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+ .chcr = DM_INC | 0x800 | 0x40000000 |
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TS_INDEX2VAL (XMIT_SZ_8BIT ),
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.mid_rid = 0x2a ,
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},
@@ -256,7 +256,7 @@ static const struct sh_dmae_slave_config sh7757_dmae2_slaves[] = {
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{
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.slave_id = SHDMA_SLAVE_RIIC2_RX ,
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.addr = 0x1e520013 ,
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- .chcr = SM_INC | 0x800 | 0x40000000 |
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+ .chcr = DM_INC | 0x800 | 0x40000000 |
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TS_INDEX2VAL (XMIT_SZ_8BIT ),
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.mid_rid = 0xa2 ,
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},
@@ -265,12 +265,12 @@ static const struct sh_dmae_slave_config sh7757_dmae2_slaves[] = {
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.addr = 0x1e530012 ,
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.chcr = SM_INC | 0x800 | 0x40000000 |
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TS_INDEX2VAL (XMIT_SZ_8BIT ),
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- .mid_rid = 0xab ,
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+ .mid_rid = 0xa9 ,
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},
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{
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.slave_id = SHDMA_SLAVE_RIIC3_RX ,
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.addr = 0x1e530013 ,
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- .chcr = SM_INC | 0x800 | 0x40000000 |
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+ .chcr = DM_INC | 0x800 | 0x40000000 |
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TS_INDEX2VAL (XMIT_SZ_8BIT ),
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.mid_rid = 0xaf ,
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},
@@ -279,14 +279,14 @@ static const struct sh_dmae_slave_config sh7757_dmae2_slaves[] = {
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.addr = 0x1e540012 ,
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.chcr = SM_INC | 0x800 | 0x40000000 |
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TS_INDEX2VAL (XMIT_SZ_8BIT ),
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- .mid_rid = 0xc1 ,
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+ .mid_rid = 0xc5 ,
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},
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{
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.slave_id = SHDMA_SLAVE_RIIC4_RX ,
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.addr = 0x1e540013 ,
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- .chcr = SM_INC | 0x800 | 0x40000000 |
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+ .chcr = DM_INC | 0x800 | 0x40000000 |
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TS_INDEX2VAL (XMIT_SZ_8BIT ),
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- .mid_rid = 0xc2 ,
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+ .mid_rid = 0xc6 ,
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},
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};
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@@ -301,7 +301,7 @@ static const struct sh_dmae_slave_config sh7757_dmae3_slaves[] = {
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{
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.slave_id = SHDMA_SLAVE_RIIC5_RX ,
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.addr = 0x1e550013 ,
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- .chcr = SM_INC | 0x800 | 0x40000000 |
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+ .chcr = DM_INC | 0x800 | 0x40000000 |
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TS_INDEX2VAL (XMIT_SZ_8BIT ),
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.mid_rid = 0x22 ,
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},
@@ -315,7 +315,7 @@ static const struct sh_dmae_slave_config sh7757_dmae3_slaves[] = {
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{
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.slave_id = SHDMA_SLAVE_RIIC6_RX ,
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.addr = 0x1e560013 ,
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- .chcr = SM_INC | 0x800 | 0x40000000 |
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+ .chcr = DM_INC | 0x800 | 0x40000000 |
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TS_INDEX2VAL (XMIT_SZ_8BIT ),
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.mid_rid = 0x2a ,
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},
@@ -329,7 +329,7 @@ static const struct sh_dmae_slave_config sh7757_dmae3_slaves[] = {
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{
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.slave_id = SHDMA_SLAVE_RIIC7_RX ,
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.addr = 0x1e570013 ,
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- .chcr = SM_INC | 0x800 | 0x40000000 |
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+ .chcr = DM_INC | 0x800 | 0x40000000 |
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TS_INDEX2VAL (XMIT_SZ_8BIT ),
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.mid_rid = 0x42 ,
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},
@@ -343,7 +343,7 @@ static const struct sh_dmae_slave_config sh7757_dmae3_slaves[] = {
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{
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.slave_id = SHDMA_SLAVE_RIIC8_RX ,
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.addr = 0x1e580013 ,
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- .chcr = SM_INC | 0x800 | 0x40000000 |
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+ .chcr = DM_INC | 0x800 | 0x40000000 |
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TS_INDEX2VAL (XMIT_SZ_8BIT ),
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.mid_rid = 0x46 ,
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},
@@ -357,7 +357,7 @@ static const struct sh_dmae_slave_config sh7757_dmae3_slaves[] = {
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{
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.slave_id = SHDMA_SLAVE_RIIC9_RX ,
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.addr = 0x1e590013 ,
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- .chcr = SM_INC | 0x800 | 0x40000000 |
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+ .chcr = DM_INC | 0x800 | 0x40000000 |
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TS_INDEX2VAL (XMIT_SZ_8BIT ),
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.mid_rid = 0x52 ,
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},
@@ -659,6 +659,54 @@ static struct platform_device spi0_device = {
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.resource = spi0_resources ,
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};
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+ static struct resource usb_ehci_resources [] = {
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+ [0 ] = {
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+ .start = 0xfe4f1000 ,
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+ .end = 0xfe4f10ff ,
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+ .flags = IORESOURCE_MEM ,
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+ },
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+ [1 ] = {
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+ .start = 57 ,
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+ .end = 57 ,
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+ .flags = IORESOURCE_IRQ ,
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+ },
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+ };
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+
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+ static struct platform_device usb_ehci_device = {
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+ .name = "sh_ehci" ,
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+ .id = -1 ,
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+ .dev = {
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+ .dma_mask = & usb_ehci_device .dev .coherent_dma_mask ,
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+ .coherent_dma_mask = DMA_BIT_MASK (32 ),
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+ },
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+ .num_resources = ARRAY_SIZE (usb_ehci_resources ),
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+ .resource = usb_ehci_resources ,
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+ };
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+
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+ static struct resource usb_ohci_resources [] = {
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+ [0 ] = {
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+ .start = 0xfe4f1800 ,
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+ .end = 0xfe4f18ff ,
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+ .flags = IORESOURCE_MEM ,
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+ },
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+ [1 ] = {
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+ .start = 57 ,
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+ .end = 57 ,
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+ .flags = IORESOURCE_IRQ ,
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+ },
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+ };
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+
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+ static struct platform_device usb_ohci_device = {
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+ .name = "sh_ohci" ,
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+ .id = -1 ,
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+ .dev = {
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+ .dma_mask = & usb_ohci_device .dev .coherent_dma_mask ,
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+ .coherent_dma_mask = DMA_BIT_MASK (32 ),
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+ },
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+ .num_resources = ARRAY_SIZE (usb_ohci_resources ),
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+ .resource = usb_ohci_resources ,
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+ };
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+
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static struct platform_device * sh7757_devices [] __initdata = {
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& scif2_device ,
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& scif3_device ,
@@ -670,6 +718,8 @@ static struct platform_device *sh7757_devices[] __initdata = {
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& dma2_device ,
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& dma3_device ,
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& spi0_device ,
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+ & usb_ehci_device ,
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+ & usb_ohci_device ,
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};
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static int __init sh7757_devices_setup (void )
@@ -1039,13 +1089,13 @@ static DECLARE_INTC_DESC(intc_desc, "sh7757", vectors, groups,
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/* Support for external interrupt pins in IRQ mode */
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static struct intc_vect vectors_irq0123 [] __initdata = {
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- INTC_VECT (IRQ0 , 0x240 ), INTC_VECT (IRQ1 , 0x280 ),
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- INTC_VECT (IRQ2 , 0x2c0 ), INTC_VECT (IRQ3 , 0x300 ),
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+ INTC_VECT (IRQ0 , 0x200 ), INTC_VECT (IRQ1 , 0x240 ),
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+ INTC_VECT (IRQ2 , 0x280 ), INTC_VECT (IRQ3 , 0x2c0 ),
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};
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static struct intc_vect vectors_irq4567 [] __initdata = {
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- INTC_VECT (IRQ4 , 0x340 ), INTC_VECT (IRQ5 , 0x380 ),
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- INTC_VECT (IRQ6 , 0x3c0 ), INTC_VECT (IRQ7 , 0x200 ),
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+ INTC_VECT (IRQ4 , 0x300 ), INTC_VECT (IRQ5 , 0x340 ),
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+ INTC_VECT (IRQ6 , 0x380 ), INTC_VECT (IRQ7 , 0x3c0 ),
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};
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static struct intc_sense_reg sense_registers [] __initdata = {
@@ -1079,14 +1129,14 @@ static struct intc_vect vectors_irl0123[] __initdata = {
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};
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static struct intc_vect vectors_irl4567 [] __initdata = {
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- INTC_VECT (IRL4_LLLL , 0xb00 ), INTC_VECT (IRL4_LLLH , 0xb20 ),
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- INTC_VECT (IRL4_LLHL , 0xb40 ), INTC_VECT (IRL4_LLHH , 0xb60 ),
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- INTC_VECT (IRL4_LHLL , 0xb80 ), INTC_VECT (IRL4_LHLH , 0xba0 ),
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- INTC_VECT (IRL4_LHHL , 0xbc0 ), INTC_VECT (IRL4_LHHH , 0xbe0 ),
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- INTC_VECT (IRL4_HLLL , 0xc00 ), INTC_VECT (IRL4_HLLH , 0xc20 ),
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- INTC_VECT (IRL4_HLHL , 0xc40 ), INTC_VECT (IRL4_HLHH , 0xc60 ),
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- INTC_VECT (IRL4_HHLL , 0xc80 ), INTC_VECT (IRL4_HHLH , 0xca0 ),
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- INTC_VECT (IRL4_HHHL , 0xcc0 ),
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+ INTC_VECT (IRL4_LLLL , 0x200 ), INTC_VECT (IRL4_LLLH , 0x220 ),
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+ INTC_VECT (IRL4_LLHL , 0x240 ), INTC_VECT (IRL4_LLHH , 0x260 ),
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+ INTC_VECT (IRL4_LHLL , 0x280 ), INTC_VECT (IRL4_LHLH , 0x2a0 ),
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+ INTC_VECT (IRL4_LHHL , 0x2c0 ), INTC_VECT (IRL4_LHHH , 0x2e0 ),
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+ INTC_VECT (IRL4_HLLL , 0x300 ), INTC_VECT (IRL4_HLLH , 0x320 ),
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+ INTC_VECT (IRL4_HLHL , 0x340 ), INTC_VECT (IRL4_HLHH , 0x360 ),
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+ INTC_VECT (IRL4_HHLL , 0x380 ), INTC_VECT (IRL4_HHLH , 0x3a0 ),
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+ INTC_VECT (IRL4_HHHL , 0x3c0 ),
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};
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static DECLARE_INTC_DESC (intc_desc_irl0123 , "sh7757-irl0123" , vectors_irl0123 ,
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