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hkallweitdavem330
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r8169: change type of first argument in rtl_tx_performance_tweak
Changing the type of the first argument to struct rtl8169_private * is more in line with the other functions in the driver and it allows to reduce the code size. Signed-off-by: Heiner Kallweit <[email protected]> Signed-off-by: David S. Miller <[email protected]>
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1 file changed

+24
-38
lines changed
  • drivers/net/ethernet/realtek

1 file changed

+24
-38
lines changed

drivers/net/ethernet/realtek/r8169.c

Lines changed: 24 additions & 38 deletions
Original file line numberDiff line numberDiff line change
@@ -897,9 +897,9 @@ static void rtl_unlock_work(struct rtl8169_private *tp)
897897
mutex_unlock(&tp->wk.mutex);
898898
}
899899

900-
static void rtl_tx_performance_tweak(struct pci_dev *pdev, u16 force)
900+
static void rtl_tx_performance_tweak(struct rtl8169_private *tp, u16 force)
901901
{
902-
pcie_capability_clear_and_set_word(pdev, PCI_EXP_DEVCTL,
902+
pcie_capability_clear_and_set_word(tp->pci_dev, PCI_EXP_DEVCTL,
903903
PCI_EXP_DEVCTL_READRQ, force);
904904
}
905905

@@ -5111,14 +5111,14 @@ static void r8168c_hw_jumbo_enable(struct rtl8169_private *tp)
51115111
{
51125112
RTL_W8(tp, Config3, RTL_R8(tp, Config3) | Jumbo_En0);
51135113
RTL_W8(tp, Config4, RTL_R8(tp, Config4) | Jumbo_En1);
5114-
rtl_tx_performance_tweak(tp->pci_dev, PCI_EXP_DEVCTL_READRQ_512B);
5114+
rtl_tx_performance_tweak(tp, PCI_EXP_DEVCTL_READRQ_512B);
51155115
}
51165116

51175117
static void r8168c_hw_jumbo_disable(struct rtl8169_private *tp)
51185118
{
51195119
RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Jumbo_En0);
51205120
RTL_W8(tp, Config4, RTL_R8(tp, Config4) & ~Jumbo_En1);
5121-
rtl_tx_performance_tweak(tp->pci_dev, 0x5 << MAX_READ_REQUEST_SHIFT);
5121+
rtl_tx_performance_tweak(tp, 0x5 << MAX_READ_REQUEST_SHIFT);
51225122
}
51235123

51245124
static void r8168dp_hw_jumbo_enable(struct rtl8169_private *tp)
@@ -5136,26 +5136,26 @@ static void r8168e_hw_jumbo_enable(struct rtl8169_private *tp)
51365136
RTL_W8(tp, MaxTxPacketSize, 0x3f);
51375137
RTL_W8(tp, Config3, RTL_R8(tp, Config3) | Jumbo_En0);
51385138
RTL_W8(tp, Config4, RTL_R8(tp, Config4) | 0x01);
5139-
rtl_tx_performance_tweak(tp->pci_dev, PCI_EXP_DEVCTL_READRQ_512B);
5139+
rtl_tx_performance_tweak(tp, PCI_EXP_DEVCTL_READRQ_512B);
51405140
}
51415141

51425142
static void r8168e_hw_jumbo_disable(struct rtl8169_private *tp)
51435143
{
51445144
RTL_W8(tp, MaxTxPacketSize, 0x0c);
51455145
RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Jumbo_En0);
51465146
RTL_W8(tp, Config4, RTL_R8(tp, Config4) & ~0x01);
5147-
rtl_tx_performance_tweak(tp->pci_dev, 0x5 << MAX_READ_REQUEST_SHIFT);
5147+
rtl_tx_performance_tweak(tp, 0x5 << MAX_READ_REQUEST_SHIFT);
51485148
}
51495149

51505150
static void r8168b_0_hw_jumbo_enable(struct rtl8169_private *tp)
51515151
{
5152-
rtl_tx_performance_tweak(tp->pci_dev,
5152+
rtl_tx_performance_tweak(tp,
51535153
PCI_EXP_DEVCTL_READRQ_512B | PCI_EXP_DEVCTL_NOSNOOP_EN);
51545154
}
51555155

51565156
static void r8168b_0_hw_jumbo_disable(struct rtl8169_private *tp)
51575157
{
5158-
rtl_tx_performance_tweak(tp->pci_dev,
5158+
rtl_tx_performance_tweak(tp,
51595159
(0x5 << MAX_READ_REQUEST_SHIFT) | PCI_EXP_DEVCTL_NOSNOOP_EN);
51605160
}
51615161

@@ -5724,14 +5724,12 @@ static void rtl_pcie_state_l2l3_enable(struct rtl8169_private *tp, bool enable)
57245724

57255725
static void rtl_hw_start_8168bb(struct rtl8169_private *tp)
57265726
{
5727-
struct pci_dev *pdev = tp->pci_dev;
5728-
57295727
RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Beacon_en);
57305728

57315729
RTL_W16(tp, CPlusCmd, RTL_R16(tp, CPlusCmd) & ~R8168_CPCMD_QUIRK_MASK);
57325730

57335731
if (tp->dev->mtu <= ETH_DATA_LEN) {
5734-
rtl_tx_performance_tweak(pdev, (0x5 << MAX_READ_REQUEST_SHIFT) |
5732+
rtl_tx_performance_tweak(tp, (0x5 << MAX_READ_REQUEST_SHIFT) |
57355733
PCI_EXP_DEVCTL_NOSNOOP_EN);
57365734
}
57375735
}
@@ -5754,7 +5752,7 @@ static void __rtl_hw_start_8168cp(struct rtl8169_private *tp)
57545752
RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Beacon_en);
57555753

57565754
if (tp->dev->mtu <= ETH_DATA_LEN)
5757-
rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);
5755+
rtl_tx_performance_tweak(tp, 0x5 << MAX_READ_REQUEST_SHIFT);
57585756

57595757
rtl_disable_clock_request(pdev);
57605758

@@ -5780,22 +5778,18 @@ static void rtl_hw_start_8168cp_1(struct rtl8169_private *tp)
57805778

57815779
static void rtl_hw_start_8168cp_2(struct rtl8169_private *tp)
57825780
{
5783-
struct pci_dev *pdev = tp->pci_dev;
5784-
57855781
rtl_csi_access_enable_2(tp);
57865782

57875783
RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Beacon_en);
57885784

57895785
if (tp->dev->mtu <= ETH_DATA_LEN)
5790-
rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);
5786+
rtl_tx_performance_tweak(tp, 0x5 << MAX_READ_REQUEST_SHIFT);
57915787

57925788
RTL_W16(tp, CPlusCmd, RTL_R16(tp, CPlusCmd) & ~R8168_CPCMD_QUIRK_MASK);
57935789
}
57945790

57955791
static void rtl_hw_start_8168cp_3(struct rtl8169_private *tp)
57965792
{
5797-
struct pci_dev *pdev = tp->pci_dev;
5798-
57995793
rtl_csi_access_enable_2(tp);
58005794

58015795
RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Beacon_en);
@@ -5806,7 +5800,7 @@ static void rtl_hw_start_8168cp_3(struct rtl8169_private *tp)
58065800
RTL_W8(tp, MaxTxPacketSize, TxPacketMax);
58075801

58085802
if (tp->dev->mtu <= ETH_DATA_LEN)
5809-
rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);
5803+
rtl_tx_performance_tweak(tp, 0x5 << MAX_READ_REQUEST_SHIFT);
58105804

58115805
RTL_W16(tp, CPlusCmd, RTL_R16(tp, CPlusCmd) & ~R8168_CPCMD_QUIRK_MASK);
58125806
}
@@ -5865,7 +5859,7 @@ static void rtl_hw_start_8168d(struct rtl8169_private *tp)
58655859
RTL_W8(tp, MaxTxPacketSize, TxPacketMax);
58665860

58675861
if (tp->dev->mtu <= ETH_DATA_LEN)
5868-
rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);
5862+
rtl_tx_performance_tweak(tp, 0x5 << MAX_READ_REQUEST_SHIFT);
58695863

58705864
RTL_W16(tp, CPlusCmd, RTL_R16(tp, CPlusCmd) & ~R8168_CPCMD_QUIRK_MASK);
58715865
}
@@ -5877,7 +5871,7 @@ static void rtl_hw_start_8168dp(struct rtl8169_private *tp)
58775871
rtl_csi_access_enable_1(tp);
58785872

58795873
if (tp->dev->mtu <= ETH_DATA_LEN)
5880-
rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);
5874+
rtl_tx_performance_tweak(tp, 0x5 << MAX_READ_REQUEST_SHIFT);
58815875

58825876
RTL_W8(tp, MaxTxPacketSize, TxPacketMax);
58835877

@@ -5895,7 +5889,7 @@ static void rtl_hw_start_8168d_4(struct rtl8169_private *tp)
58955889

58965890
rtl_csi_access_enable_1(tp);
58975891

5898-
rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);
5892+
rtl_tx_performance_tweak(tp, 0x5 << MAX_READ_REQUEST_SHIFT);
58995893

59005894
RTL_W8(tp, MaxTxPacketSize, TxPacketMax);
59015895

@@ -5928,7 +5922,7 @@ static void rtl_hw_start_8168e_1(struct rtl8169_private *tp)
59285922
rtl_ephy_init(tp, e_info_8168e_1, ARRAY_SIZE(e_info_8168e_1));
59295923

59305924
if (tp->dev->mtu <= ETH_DATA_LEN)
5931-
rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);
5925+
rtl_tx_performance_tweak(tp, 0x5 << MAX_READ_REQUEST_SHIFT);
59325926

59335927
RTL_W8(tp, MaxTxPacketSize, TxPacketMax);
59345928

@@ -5954,7 +5948,7 @@ static void rtl_hw_start_8168e_2(struct rtl8169_private *tp)
59545948
rtl_ephy_init(tp, e_info_8168e_2, ARRAY_SIZE(e_info_8168e_2));
59555949

59565950
if (tp->dev->mtu <= ETH_DATA_LEN)
5957-
rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);
5951+
rtl_tx_performance_tweak(tp, 0x5 << MAX_READ_REQUEST_SHIFT);
59585952

59595953
rtl_eri_write(tp, 0xc0, ERIAR_MASK_0011, 0x0000, ERIAR_EXGMAC);
59605954
rtl_eri_write(tp, 0xb8, ERIAR_MASK_0011, 0x0000, ERIAR_EXGMAC);
@@ -5986,7 +5980,7 @@ static void rtl_hw_start_8168f(struct rtl8169_private *tp)
59865980

59875981
rtl_csi_access_enable_2(tp);
59885982

5989-
rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);
5983+
rtl_tx_performance_tweak(tp, 0x5 << MAX_READ_REQUEST_SHIFT);
59905984

59915985
rtl_eri_write(tp, 0xc0, ERIAR_MASK_0011, 0x0000, ERIAR_EXGMAC);
59925986
rtl_eri_write(tp, 0xb8, ERIAR_MASK_0011, 0x0000, ERIAR_EXGMAC);
@@ -6048,8 +6042,6 @@ static void rtl_hw_start_8411(struct rtl8169_private *tp)
60486042

60496043
static void rtl_hw_start_8168g(struct rtl8169_private *tp)
60506044
{
6051-
struct pci_dev *pdev = tp->pci_dev;
6052-
60536045
RTL_W32(tp, TxConfig, RTL_R32(tp, TxConfig) | TXCFG_AUTO_FIFO);
60546046

60556047
rtl_eri_write(tp, 0xc8, ERIAR_MASK_0101, 0x080002, ERIAR_EXGMAC);
@@ -6059,7 +6051,7 @@ static void rtl_hw_start_8168g(struct rtl8169_private *tp)
60596051

60606052
rtl_csi_access_enable_1(tp);
60616053

6062-
rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);
6054+
rtl_tx_performance_tweak(tp, 0x5 << MAX_READ_REQUEST_SHIFT);
60636055

60646056
rtl_w0w1_eri(tp, 0xdc, ERIAR_MASK_0001, 0x00, 0x01, ERIAR_EXGMAC);
60656057
rtl_w0w1_eri(tp, 0xdc, ERIAR_MASK_0001, 0x01, 0x00, ERIAR_EXGMAC);
@@ -6134,7 +6126,6 @@ static void rtl_hw_start_8411_2(struct rtl8169_private *tp)
61346126

61356127
static void rtl_hw_start_8168h_1(struct rtl8169_private *tp)
61366128
{
6137-
struct pci_dev *pdev = tp->pci_dev;
61386129
int rg_saw_cnt;
61396130
u32 data;
61406131
static const struct ephy_info e_info_8168h_1[] = {
@@ -6160,7 +6151,7 @@ static void rtl_hw_start_8168h_1(struct rtl8169_private *tp)
61606151

61616152
rtl_csi_access_enable_1(tp);
61626153

6163-
rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);
6154+
rtl_tx_performance_tweak(tp, 0x5 << MAX_READ_REQUEST_SHIFT);
61646155

61656156
rtl_w0w1_eri(tp, 0xdc, ERIAR_MASK_0001, 0x00, 0x01, ERIAR_EXGMAC);
61666157
rtl_w0w1_eri(tp, 0xdc, ERIAR_MASK_0001, 0x01, 0x00, ERIAR_EXGMAC);
@@ -6231,8 +6222,6 @@ static void rtl_hw_start_8168h_1(struct rtl8169_private *tp)
62316222

62326223
static void rtl_hw_start_8168ep(struct rtl8169_private *tp)
62336224
{
6234-
struct pci_dev *pdev = tp->pci_dev;
6235-
62366225
rtl8168ep_stop_cmac(tp);
62376226

62386227
RTL_W32(tp, TxConfig, RTL_R32(tp, TxConfig) | TXCFG_AUTO_FIFO);
@@ -6244,7 +6233,7 @@ static void rtl_hw_start_8168ep(struct rtl8169_private *tp)
62446233

62456234
rtl_csi_access_enable_1(tp);
62466235

6247-
rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);
6236+
rtl_tx_performance_tweak(tp, 0x5 << MAX_READ_REQUEST_SHIFT);
62486237

62496238
rtl_w0w1_eri(tp, 0xdc, ERIAR_MASK_0001, 0x00, 0x01, ERIAR_EXGMAC);
62506239
rtl_w0w1_eri(tp, 0xdc, ERIAR_MASK_0001, 0x01, 0x00, ERIAR_EXGMAC);
@@ -6494,7 +6483,6 @@ static void rtl_hw_start_8168(struct net_device *dev)
64946483

64956484
static void rtl_hw_start_8102e_1(struct rtl8169_private *tp)
64966485
{
6497-
struct pci_dev *pdev = tp->pci_dev;
64986486
static const struct ephy_info e_info_8102e_1[] = {
64996487
{ 0x01, 0, 0x6e65 },
65006488
{ 0x02, 0, 0x091f },
@@ -6511,7 +6499,7 @@ static void rtl_hw_start_8102e_1(struct rtl8169_private *tp)
65116499

65126500
RTL_W8(tp, DBG_REG, FIX_NAK_1);
65136501

6514-
rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);
6502+
rtl_tx_performance_tweak(tp, 0x5 << MAX_READ_REQUEST_SHIFT);
65156503

65166504
RTL_W8(tp, Config1,
65176505
LEDS1 | LEDS0 | Speed_down | MEMMAP | IOMAP | VPD | PMEnable);
@@ -6526,11 +6514,9 @@ static void rtl_hw_start_8102e_1(struct rtl8169_private *tp)
65266514

65276515
static void rtl_hw_start_8102e_2(struct rtl8169_private *tp)
65286516
{
6529-
struct pci_dev *pdev = tp->pci_dev;
6530-
65316517
rtl_csi_access_enable_2(tp);
65326518

6533-
rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);
6519+
rtl_tx_performance_tweak(tp, 0x5 << MAX_READ_REQUEST_SHIFT);
65346520

65356521
RTL_W8(tp, Config1, MEMMAP | IOMAP | VPD | PMEnable);
65366522
RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Beacon_en);
@@ -6593,7 +6579,7 @@ static void rtl_hw_start_8402(struct rtl8169_private *tp)
65936579

65946580
rtl_ephy_init(tp, e_info_8402, ARRAY_SIZE(e_info_8402));
65956581

6596-
rtl_tx_performance_tweak(tp->pci_dev, 0x5 << MAX_READ_REQUEST_SHIFT);
6582+
rtl_tx_performance_tweak(tp, 0x5 << MAX_READ_REQUEST_SHIFT);
65976583

65986584
rtl_eri_write(tp, 0xc8, ERIAR_MASK_1111, 0x00000002, ERIAR_EXGMAC);
65996585
rtl_eri_write(tp, 0xe8, ERIAR_MASK_1111, 0x00000006, ERIAR_EXGMAC);

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