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| 1 | +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause |
| 2 | +%YAML 1.2 |
| 3 | +--- |
| 4 | +$id: http://devicetree.org/schemas/i2c/nuvoton,npcm7xx-i2c.yaml# |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | + |
| 7 | +title: nuvoton NPCM7XX I2C Controller Device Tree Bindings |
| 8 | + |
| 9 | +description: | |
| 10 | + The NPCM750x includes sixteen I2C bus controllers. All Controllers support |
| 11 | + both master and slave mode. Each controller can switch between master and slave |
| 12 | + at run time (i.e. IPMB mode). Each controller has two 16 byte HW FIFO for TX and |
| 13 | + RX. |
| 14 | +
|
| 15 | +maintainers: |
| 16 | + |
| 17 | + |
| 18 | +properties: |
| 19 | + compatible: |
| 20 | + const: nuvoton,npcm7xx-i2c |
| 21 | + |
| 22 | + reg: |
| 23 | + maxItems: 1 |
| 24 | + |
| 25 | + interrupts: |
| 26 | + maxItems: 1 |
| 27 | + |
| 28 | + clocks: |
| 29 | + maxItems: 1 |
| 30 | + description: Reference clock for the I2C bus |
| 31 | + |
| 32 | + clock-frequency: |
| 33 | + description: Desired I2C bus clock frequency in Hz. If not specified, |
| 34 | + the default 100 kHz frequency will be used. |
| 35 | + possible values are 100000, 400000 and 1000000. |
| 36 | + default: 100000 |
| 37 | + enum: [100000, 400000, 1000000] |
| 38 | + |
| 39 | +required: |
| 40 | + - compatible |
| 41 | + - reg |
| 42 | + - interrupts |
| 43 | + - clocks |
| 44 | + |
| 45 | +allOf: |
| 46 | + - $ref: /schemas/i2c/i2c-controller.yaml# |
| 47 | + |
| 48 | +unevaluatedProperties: false |
| 49 | + |
| 50 | +examples: |
| 51 | + - | |
| 52 | + #include <dt-bindings/clock/nuvoton,npcm7xx-clock.h> |
| 53 | + #include <dt-bindings/interrupt-controller/arm-gic.h> |
| 54 | + i2c0: i2c@80000 { |
| 55 | + reg = <0x80000 0x1000>; |
| 56 | + clocks = <&clk NPCM7XX_CLK_APB2>; |
| 57 | + clock-frequency = <100000>; |
| 58 | + interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>; |
| 59 | + compatible = "nuvoton,npcm750-i2c"; |
| 60 | + }; |
| 61 | +
|
| 62 | +... |
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