Skip to content

Commit cd78265

Browse files
viviendavem330
vivien
authored and
davem330
committed
net: dsa: mv88e6xxx: rework jumbo size operation
Marvell chips have a Jumbo Mode to set the maximum frame size (MTU). The mv88e6xxx_ops structure is meant to contain generic functionalities, no driver logic. Change port_jumbo_config to port_set_jumbo_size setting the mode from a given maximum size value. There is no functional changes since we still use 10240 bytes. At the same time, correctly clear all Jumbo Mode bits before writing. Reviewed-by: Andrew Lunn <[email protected]> Signed-off-by: Vivien Didelot <[email protected]> Signed-off-by: David S. Miller <[email protected]>
1 parent 0898432 commit cd78265

File tree

4 files changed

+36
-23
lines changed

4 files changed

+36
-23
lines changed

‎drivers/net/dsa/mv88e6xxx/chip.c

Lines changed: 19 additions & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -1876,8 +1876,8 @@ static int mv88e6xxx_setup_port(struct mv88e6xxx_chip *chip, int port)
18761876
if (err)
18771877
return err;
18781878

1879-
if (chip->info->ops->port_jumbo_config) {
1880-
err = chip->info->ops->port_jumbo_config(chip, port);
1879+
if (chip->info->ops->port_set_jumbo_size) {
1880+
err = chip->info->ops->port_set_jumbo_size(chip, port, 10240);
18811881
if (err)
18821882
return err;
18831883
}
@@ -2415,7 +2415,7 @@ static const struct mv88e6xxx_ops mv88e6097_ops = {
24152415
.port_set_frame_mode = mv88e6351_port_set_frame_mode,
24162416
.port_set_egress_floods = mv88e6352_port_set_egress_floods,
24172417
.port_set_ether_type = mv88e6351_port_set_ether_type,
2418-
.port_jumbo_config = mv88e6165_port_jumbo_config,
2418+
.port_set_jumbo_size = mv88e6165_port_set_jumbo_size,
24192419
.port_egress_rate_limiting = mv88e6095_port_egress_rate_limiting,
24202420
.port_pause_limit = mv88e6097_port_pause_limit,
24212421
.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
@@ -2471,7 +2471,7 @@ static const struct mv88e6xxx_ops mv88e6131_ops = {
24712471
.port_set_egress_floods = mv88e6185_port_set_egress_floods,
24722472
.port_set_ether_type = mv88e6351_port_set_ether_type,
24732473
.port_set_upstream_port = mv88e6095_port_set_upstream_port,
2474-
.port_jumbo_config = mv88e6165_port_jumbo_config,
2474+
.port_set_jumbo_size = mv88e6165_port_set_jumbo_size,
24752475
.port_egress_rate_limiting = mv88e6097_port_egress_rate_limiting,
24762476
.port_pause_limit = mv88e6097_port_pause_limit,
24772477
.stats_snapshot = mv88e6xxx_g1_stats_snapshot,
@@ -2504,7 +2504,7 @@ static const struct mv88e6xxx_ops mv88e6141_ops = {
25042504
.port_set_frame_mode = mv88e6351_port_set_frame_mode,
25052505
.port_set_egress_floods = mv88e6352_port_set_egress_floods,
25062506
.port_set_ether_type = mv88e6351_port_set_ether_type,
2507-
.port_jumbo_config = mv88e6165_port_jumbo_config,
2507+
.port_set_jumbo_size = mv88e6165_port_set_jumbo_size,
25082508
.port_egress_rate_limiting = mv88e6097_port_egress_rate_limiting,
25092509
.port_pause_limit = mv88e6097_port_pause_limit,
25102510
.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
@@ -2534,7 +2534,7 @@ static const struct mv88e6xxx_ops mv88e6161_ops = {
25342534
.port_set_frame_mode = mv88e6351_port_set_frame_mode,
25352535
.port_set_egress_floods = mv88e6352_port_set_egress_floods,
25362536
.port_set_ether_type = mv88e6351_port_set_ether_type,
2537-
.port_jumbo_config = mv88e6165_port_jumbo_config,
2537+
.port_set_jumbo_size = mv88e6165_port_set_jumbo_size,
25382538
.port_egress_rate_limiting = mv88e6097_port_egress_rate_limiting,
25392539
.port_pause_limit = mv88e6097_port_pause_limit,
25402540
.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
@@ -2588,7 +2588,7 @@ static const struct mv88e6xxx_ops mv88e6171_ops = {
25882588
.port_set_frame_mode = mv88e6351_port_set_frame_mode,
25892589
.port_set_egress_floods = mv88e6352_port_set_egress_floods,
25902590
.port_set_ether_type = mv88e6351_port_set_ether_type,
2591-
.port_jumbo_config = mv88e6165_port_jumbo_config,
2591+
.port_set_jumbo_size = mv88e6165_port_set_jumbo_size,
25922592
.port_egress_rate_limiting = mv88e6097_port_egress_rate_limiting,
25932593
.port_pause_limit = mv88e6097_port_pause_limit,
25942594
.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
@@ -2621,7 +2621,7 @@ static const struct mv88e6xxx_ops mv88e6172_ops = {
26212621
.port_set_frame_mode = mv88e6351_port_set_frame_mode,
26222622
.port_set_egress_floods = mv88e6352_port_set_egress_floods,
26232623
.port_set_ether_type = mv88e6351_port_set_ether_type,
2624-
.port_jumbo_config = mv88e6165_port_jumbo_config,
2624+
.port_set_jumbo_size = mv88e6165_port_set_jumbo_size,
26252625
.port_egress_rate_limiting = mv88e6097_port_egress_rate_limiting,
26262626
.port_pause_limit = mv88e6097_port_pause_limit,
26272627
.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
@@ -2653,7 +2653,7 @@ static const struct mv88e6xxx_ops mv88e6175_ops = {
26532653
.port_set_frame_mode = mv88e6351_port_set_frame_mode,
26542654
.port_set_egress_floods = mv88e6352_port_set_egress_floods,
26552655
.port_set_ether_type = mv88e6351_port_set_ether_type,
2656-
.port_jumbo_config = mv88e6165_port_jumbo_config,
2656+
.port_set_jumbo_size = mv88e6165_port_set_jumbo_size,
26572657
.port_egress_rate_limiting = mv88e6097_port_egress_rate_limiting,
26582658
.port_pause_limit = mv88e6097_port_pause_limit,
26592659
.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
@@ -2686,7 +2686,7 @@ static const struct mv88e6xxx_ops mv88e6176_ops = {
26862686
.port_set_frame_mode = mv88e6351_port_set_frame_mode,
26872687
.port_set_egress_floods = mv88e6352_port_set_egress_floods,
26882688
.port_set_ether_type = mv88e6351_port_set_ether_type,
2689-
.port_jumbo_config = mv88e6165_port_jumbo_config,
2689+
.port_set_jumbo_size = mv88e6165_port_set_jumbo_size,
26902690
.port_egress_rate_limiting = mv88e6097_port_egress_rate_limiting,
26912691
.port_pause_limit = mv88e6097_port_pause_limit,
26922692
.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
@@ -2846,7 +2846,7 @@ static const struct mv88e6xxx_ops mv88e6240_ops = {
28462846
.port_set_frame_mode = mv88e6351_port_set_frame_mode,
28472847
.port_set_egress_floods = mv88e6352_port_set_egress_floods,
28482848
.port_set_ether_type = mv88e6351_port_set_ether_type,
2849-
.port_jumbo_config = mv88e6165_port_jumbo_config,
2849+
.port_set_jumbo_size = mv88e6165_port_set_jumbo_size,
28502850
.port_egress_rate_limiting = mv88e6097_port_egress_rate_limiting,
28512851
.port_pause_limit = mv88e6097_port_pause_limit,
28522852
.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
@@ -2913,7 +2913,7 @@ static const struct mv88e6xxx_ops mv88e6320_ops = {
29132913
.port_set_frame_mode = mv88e6351_port_set_frame_mode,
29142914
.port_set_egress_floods = mv88e6352_port_set_egress_floods,
29152915
.port_set_ether_type = mv88e6351_port_set_ether_type,
2916-
.port_jumbo_config = mv88e6165_port_jumbo_config,
2916+
.port_set_jumbo_size = mv88e6165_port_set_jumbo_size,
29172917
.port_egress_rate_limiting = mv88e6097_port_egress_rate_limiting,
29182918
.port_pause_limit = mv88e6097_port_pause_limit,
29192919
.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
@@ -2944,7 +2944,7 @@ static const struct mv88e6xxx_ops mv88e6321_ops = {
29442944
.port_set_frame_mode = mv88e6351_port_set_frame_mode,
29452945
.port_set_egress_floods = mv88e6352_port_set_egress_floods,
29462946
.port_set_ether_type = mv88e6351_port_set_ether_type,
2947-
.port_jumbo_config = mv88e6165_port_jumbo_config,
2947+
.port_set_jumbo_size = mv88e6165_port_set_jumbo_size,
29482948
.port_egress_rate_limiting = mv88e6097_port_egress_rate_limiting,
29492949
.port_pause_limit = mv88e6097_port_pause_limit,
29502950
.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
@@ -2975,7 +2975,7 @@ static const struct mv88e6xxx_ops mv88e6341_ops = {
29752975
.port_set_frame_mode = mv88e6351_port_set_frame_mode,
29762976
.port_set_egress_floods = mv88e6352_port_set_egress_floods,
29772977
.port_set_ether_type = mv88e6351_port_set_ether_type,
2978-
.port_jumbo_config = mv88e6165_port_jumbo_config,
2978+
.port_set_jumbo_size = mv88e6165_port_set_jumbo_size,
29792979
.port_egress_rate_limiting = mv88e6097_port_egress_rate_limiting,
29802980
.port_pause_limit = mv88e6097_port_pause_limit,
29812981
.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
@@ -3006,7 +3006,7 @@ static const struct mv88e6xxx_ops mv88e6350_ops = {
30063006
.port_set_frame_mode = mv88e6351_port_set_frame_mode,
30073007
.port_set_egress_floods = mv88e6352_port_set_egress_floods,
30083008
.port_set_ether_type = mv88e6351_port_set_ether_type,
3009-
.port_jumbo_config = mv88e6165_port_jumbo_config,
3009+
.port_set_jumbo_size = mv88e6165_port_set_jumbo_size,
30103010
.port_egress_rate_limiting = mv88e6097_port_egress_rate_limiting,
30113011
.port_pause_limit = mv88e6097_port_pause_limit,
30123012
.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
@@ -3037,7 +3037,7 @@ static const struct mv88e6xxx_ops mv88e6351_ops = {
30373037
.port_set_frame_mode = mv88e6351_port_set_frame_mode,
30383038
.port_set_egress_floods = mv88e6352_port_set_egress_floods,
30393039
.port_set_ether_type = mv88e6351_port_set_ether_type,
3040-
.port_jumbo_config = mv88e6165_port_jumbo_config,
3040+
.port_set_jumbo_size = mv88e6165_port_set_jumbo_size,
30413041
.port_egress_rate_limiting = mv88e6097_port_egress_rate_limiting,
30423042
.port_pause_limit = mv88e6097_port_pause_limit,
30433043
.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
@@ -3070,7 +3070,7 @@ static const struct mv88e6xxx_ops mv88e6352_ops = {
30703070
.port_set_frame_mode = mv88e6351_port_set_frame_mode,
30713071
.port_set_egress_floods = mv88e6352_port_set_egress_floods,
30723072
.port_set_ether_type = mv88e6351_port_set_ether_type,
3073-
.port_jumbo_config = mv88e6165_port_jumbo_config,
3073+
.port_set_jumbo_size = mv88e6165_port_set_jumbo_size,
30743074
.port_egress_rate_limiting = mv88e6097_port_egress_rate_limiting,
30753075
.port_pause_limit = mv88e6097_port_pause_limit,
30763076
.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
@@ -3104,7 +3104,7 @@ static const struct mv88e6xxx_ops mv88e6390_ops = {
31043104
.port_set_frame_mode = mv88e6351_port_set_frame_mode,
31053105
.port_set_egress_floods = mv88e6352_port_set_egress_floods,
31063106
.port_set_ether_type = mv88e6351_port_set_ether_type,
3107-
.port_jumbo_config = mv88e6165_port_jumbo_config,
3107+
.port_set_jumbo_size = mv88e6165_port_set_jumbo_size,
31083108
.port_egress_rate_limiting = mv88e6097_port_egress_rate_limiting,
31093109
.port_pause_limit = mv88e6390_port_pause_limit,
31103110
.port_set_cmode = mv88e6390x_port_set_cmode,
@@ -3140,7 +3140,7 @@ static const struct mv88e6xxx_ops mv88e6390x_ops = {
31403140
.port_set_frame_mode = mv88e6351_port_set_frame_mode,
31413141
.port_set_egress_floods = mv88e6352_port_set_egress_floods,
31423142
.port_set_ether_type = mv88e6351_port_set_ether_type,
3143-
.port_jumbo_config = mv88e6165_port_jumbo_config,
3143+
.port_set_jumbo_size = mv88e6165_port_set_jumbo_size,
31443144
.port_egress_rate_limiting = mv88e6097_port_egress_rate_limiting,
31453145
.port_pause_limit = mv88e6390_port_pause_limit,
31463146
.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,

‎drivers/net/dsa/mv88e6xxx/chip.h

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -422,7 +422,8 @@ struct mv88e6xxx_ops {
422422
bool unicast, bool multicast);
423423
int (*port_set_ether_type)(struct mv88e6xxx_chip *chip, int port,
424424
u16 etype);
425-
int (*port_jumbo_config)(struct mv88e6xxx_chip *chip, int port);
425+
int (*port_set_jumbo_size)(struct mv88e6xxx_chip *chip, int port,
426+
size_t size);
426427

427428
int (*port_egress_rate_limiting)(struct mv88e6xxx_chip *chip, int port);
428429
int (*port_pause_limit)(struct mv88e6xxx_chip *chip, int port, u8 in,

‎drivers/net/dsa/mv88e6xxx/port.c

Lines changed: 12 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -816,7 +816,8 @@ int mv88e6xxx_port_set_map_da(struct mv88e6xxx_chip *chip, int port)
816816
return mv88e6xxx_port_write(chip, port, PORT_CONTROL_2, reg);
817817
}
818818

819-
int mv88e6165_port_jumbo_config(struct mv88e6xxx_chip *chip, int port)
819+
int mv88e6165_port_set_jumbo_size(struct mv88e6xxx_chip *chip, int port,
820+
size_t size)
820821
{
821822
u16 reg;
822823
int err;
@@ -825,7 +826,16 @@ int mv88e6165_port_jumbo_config(struct mv88e6xxx_chip *chip, int port)
825826
if (err)
826827
return err;
827828

828-
reg |= PORT_CONTROL_2_JUMBO_10240;
829+
reg &= ~PORT_CONTROL_2_JUMBO_MASK;
830+
831+
if (size <= 1522)
832+
reg |= PORT_CONTROL_2_JUMBO_1522;
833+
else if (size <= 2048)
834+
reg |= PORT_CONTROL_2_JUMBO_2048;
835+
else if (size <= 10240)
836+
reg |= PORT_CONTROL_2_JUMBO_10240;
837+
else
838+
return -ERANGE;
829839

830840
return mv88e6xxx_port_write(chip, port, PORT_CONTROL_2, reg);
831841
}

‎drivers/net/dsa/mv88e6xxx/port.h

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -133,6 +133,7 @@
133133
#define PORT_CONTROL_2_VTU_PRI_OVERRIDE BIT(14)
134134
#define PORT_CONTROL_2_SA_PRIO_OVERRIDE BIT(13)
135135
#define PORT_CONTROL_2_DA_PRIO_OVERRIDE BIT(12)
136+
#define PORT_CONTROL_2_JUMBO_MASK (0x03 << 12)
136137
#define PORT_CONTROL_2_JUMBO_1522 (0x00 << 12)
137138
#define PORT_CONTROL_2_JUMBO_2048 (0x01 << 12)
138139
#define PORT_CONTROL_2_JUMBO_10240 (0x02 << 12)
@@ -225,7 +226,8 @@ int mv88e6351_port_set_ether_type(struct mv88e6xxx_chip *chip, int port,
225226
u16 etype);
226227
int mv88e6xxx_port_set_message_port(struct mv88e6xxx_chip *chip, int port,
227228
bool message_port);
228-
int mv88e6165_port_jumbo_config(struct mv88e6xxx_chip *chip, int port);
229+
int mv88e6165_port_set_jumbo_size(struct mv88e6xxx_chip *chip, int port,
230+
size_t size);
229231
int mv88e6095_port_egress_rate_limiting(struct mv88e6xxx_chip *chip, int port);
230232
int mv88e6097_port_egress_rate_limiting(struct mv88e6xxx_chip *chip, int port);
231233
int mv88e6097_port_pause_limit(struct mv88e6xxx_chip *chip, int port, u8 in,

0 commit comments

Comments
 (0)