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shimodayvinodkoul
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dmaengine: rcar-dmac: Fix DMACHCLR handling if iommu is mapped
The commit 20c169a ("dmaengine: rcar-dmac: clear pertinence number of channels") forgets to clear the last channel by DMACHCLR in rcar_dmac_init() (and doesn't need to clear the first channel) if iommu is mapped to the device. So, this patch fixes it by using "channels_mask" bitfield. Note that the hardware and driver don't support more than 32 bits in DMACHCLR register anyway, so this patch should reject more than 32 channels in rcar_dmac_parse_of(). Fixes: 20c169a ("dmaengine: rcar-dmac: clear pertinence number of channels") Signed-off-by: Yoshihiro Shimoda <[email protected]> Reviewed-by: Simon Horman <[email protected]> Reviewed-by: Geert Uytterhoeven <[email protected]> Link: https://lore.kernel.org/r/1567424643-26629-1-git-send-email-yoshihiro.shimoda.uh@renesas.com Signed-off-by: Vinod Koul <[email protected]>
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drivers/dma/sh/rcar-dmac.c

Lines changed: 19 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -192,6 +192,7 @@ struct rcar_dmac_chan {
192192
* @iomem: remapped I/O memory base
193193
* @n_channels: number of available channels
194194
* @channels: array of DMAC channels
195+
* @channels_mask: bitfield of which DMA channels are managed by this driver
195196
* @modules: bitmask of client modules in use
196197
*/
197198
struct rcar_dmac {
@@ -202,6 +203,7 @@ struct rcar_dmac {
202203

203204
unsigned int n_channels;
204205
struct rcar_dmac_chan *channels;
206+
unsigned int channels_mask;
205207

206208
DECLARE_BITMAP(modules, 256);
207209
};
@@ -438,7 +440,7 @@ static int rcar_dmac_init(struct rcar_dmac *dmac)
438440
u16 dmaor;
439441

440442
/* Clear all channels and enable the DMAC globally. */
441-
rcar_dmac_write(dmac, RCAR_DMACHCLR, GENMASK(dmac->n_channels - 1, 0));
443+
rcar_dmac_write(dmac, RCAR_DMACHCLR, dmac->channels_mask);
442444
rcar_dmac_write(dmac, RCAR_DMAOR,
443445
RCAR_DMAOR_PRI_FIXED | RCAR_DMAOR_DME);
444446

@@ -814,6 +816,9 @@ static void rcar_dmac_stop_all_chan(struct rcar_dmac *dmac)
814816
for (i = 0; i < dmac->n_channels; ++i) {
815817
struct rcar_dmac_chan *chan = &dmac->channels[i];
816818

819+
if (!(dmac->channels_mask & BIT(i)))
820+
continue;
821+
817822
/* Stop and reinitialize the channel. */
818823
spin_lock_irq(&chan->lock);
819824
rcar_dmac_chan_halt(chan);
@@ -1776,6 +1781,8 @@ static int rcar_dmac_chan_probe(struct rcar_dmac *dmac,
17761781
return 0;
17771782
}
17781783

1784+
#define RCAR_DMAC_MAX_CHANNELS 32
1785+
17791786
static int rcar_dmac_parse_of(struct device *dev, struct rcar_dmac *dmac)
17801787
{
17811788
struct device_node *np = dev->of_node;
@@ -1787,12 +1794,16 @@ static int rcar_dmac_parse_of(struct device *dev, struct rcar_dmac *dmac)
17871794
return ret;
17881795
}
17891796

1790-
if (dmac->n_channels <= 0 || dmac->n_channels >= 100) {
1797+
/* The hardware and driver don't support more than 32 bits in CHCLR */
1798+
if (dmac->n_channels <= 0 ||
1799+
dmac->n_channels >= RCAR_DMAC_MAX_CHANNELS) {
17911800
dev_err(dev, "invalid number of channels %u\n",
17921801
dmac->n_channels);
17931802
return -EINVAL;
17941803
}
17951804

1805+
dmac->channels_mask = GENMASK(dmac->n_channels - 1, 0);
1806+
17961807
return 0;
17971808
}
17981809

@@ -1802,7 +1813,6 @@ static int rcar_dmac_probe(struct platform_device *pdev)
18021813
DMA_SLAVE_BUSWIDTH_2_BYTES | DMA_SLAVE_BUSWIDTH_4_BYTES |
18031814
DMA_SLAVE_BUSWIDTH_8_BYTES | DMA_SLAVE_BUSWIDTH_16_BYTES |
18041815
DMA_SLAVE_BUSWIDTH_32_BYTES | DMA_SLAVE_BUSWIDTH_64_BYTES;
1805-
unsigned int channels_offset = 0;
18061816
struct dma_device *engine;
18071817
struct rcar_dmac *dmac;
18081818
struct resource *mem;
@@ -1831,10 +1841,8 @@ static int rcar_dmac_probe(struct platform_device *pdev)
18311841
* level we can't disable it selectively, so ignore channel 0 for now if
18321842
* the device is part of an IOMMU group.
18331843
*/
1834-
if (device_iommu_mapped(&pdev->dev)) {
1835-
dmac->n_channels--;
1836-
channels_offset = 1;
1837-
}
1844+
if (device_iommu_mapped(&pdev->dev))
1845+
dmac->channels_mask &= ~BIT(0);
18381846

18391847
dmac->channels = devm_kcalloc(&pdev->dev, dmac->n_channels,
18401848
sizeof(*dmac->channels), GFP_KERNEL);
@@ -1892,8 +1900,10 @@ static int rcar_dmac_probe(struct platform_device *pdev)
18921900
INIT_LIST_HEAD(&engine->channels);
18931901

18941902
for (i = 0; i < dmac->n_channels; ++i) {
1895-
ret = rcar_dmac_chan_probe(dmac, &dmac->channels[i],
1896-
i + channels_offset);
1903+
if (!(dmac->channels_mask & BIT(i)))
1904+
continue;
1905+
1906+
ret = rcar_dmac_chan_probe(dmac, &dmac->channels[i], i);
18971907
if (ret < 0)
18981908
goto error;
18991909
}

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